DRAM Digital RTL Design Engineer — Timing & Optimization

Micron Technology, Inc.; Boise (ID); Hybrid; USD 110,000 - 150,000; Full time

Job summary

Micron Technology, Inc. is seeking a Digital Circuit Design Engineer to advance core DRAM digital circuits, owning RTL design and optimization within a collaborative hybrid work environment.

You will partner with design, verification, and manufacturing to boost product quality, performance, and time-to-market across DRAM products globally. Strong RTL/STA/timing closure skills and UNIX/Cadence proficiency are required.

Qualifications

• Bachelor’s degree in Electrical Engineering or equivalent practical experience.
• 6+ years of experience in digital or RTL circuit design.
• Strong experience with RTL design, STA, and timing closure.
• Experience with power delivery network circuit design and optimization.
• Proficiency in UNIX and Cadence design environments.

Responsibilities

• Design and optimize RTL for DRAM-related digital circuits and block-level designs.
• Perform STA and drive timing closure across critical paths.
• Collaborate with verification, product engineering, test, and process teams to ensure robust designs.
• Support circuit verification, layout checks, and parasitic extraction analysis.

Skills

RTL design

STA timing

Team collaboration

Communication skills

Education

Bachelor's degree in Electrical Engineering

Master's degree in Electrical Engineering

Tools

Cadence environments

IC Compiler

Job description

Micron Technology, Inc. is seeking a Digital Circuit Design Engineer to advance core DRAM digital circuits, owning RTL design and optimization within a collaborative hybrid work environment.

You will partner with design, verification, and manufacturing to boost product quality, performance, and time-to-market across DRAM products globally. Strong RTL/STA/timing closure skills and UNIX/Cadence proficiency are required.