DMTS Process Integration Engineer – Advanced Packaging | Micron, Boise

NanoHelp; Boise (ID); On-site; USD 140,000 - 200,000; Full time

Benefits offered by this job

Collaborative work culture

Healthcare plans

Paid time off

Global learning opportunities

Long-term career development

Job summary

A leading technology firm in Boise, Idaho, is seeking a DMTS Process Integration Engineer to spearhead next-generation 3DIC and hybrid bonding integrations in advanced memory packaging. Ideal candidates will have an advanced degree in engineering or related fields, with robust experience in DRAM, NAND, and yield optimization. This senior role requires strong leadership and analytical skills in a dynamic, innovative environment. Competitive salary with comprehensive benefits is offered.

Qualifications

• Expert in semiconductor process integration with focus on 3DIC and hybrid bonding.
• Strong analytical and problem-solving skills.
• Ability to work in fast-paced, high-tech environments.
• Leadership and communication skills across cross‑functional R&D and manufacturing teams
• Adaptability in dynamic, high‑tech environments

Responsibilities

• Lead process integration efforts in advanced packaging innovations.
• Develop yield improvement plans and statistical process controls.
• Mentor early-career engineers and present findings to teams.
• Drive cross-site project coordination, communication, and technology transfer
• Mentor early-career engineers, lead KT problem-solving, and contribute to training sessions
• Define contingency plans, build integration flows, and align direction with global teams
• Present findings across teams and publish ECN and change documentation
• Translate design goals into process innovation across integration domains

Skills

Advanced Packaging

DRAM

NAND

3DIC

Hybrid bonding

Data analysis

Leadership

Communication

Education

MS or PhD in Engineering, Physics, Chemistry or related fields

Tools

JMP/system tools

Statistical tools

Job description

Home Vacancies DMTS Process Integration Engineer – Advanced Packaging | Micron, Boise

DMTS Process Integration Engineer – Advanced Packaging | Micron, Boise

Drive next-gen 3DIC and hybrid bonding integration in advanced memory packaging

July 31, 2025

Micron Boise is hiring a Process Integration Engineer to lead integration strategies for advanced memory packaging. Shape 3DIC, hybrid bonding, and FO-WLP innovations in next-gen nanotechnology.

Field

Details

Title DMTS Process Integration Engineer – Advanced Package Technology Development (APTD)

Organization Micron Technology, Inc.

Work Location Boise, Idaho, USA

Research Field Nanotechnology, Electronics, Materials Engineering, Electrical Engineering, Mechanical Engineering

Funding Info Industry-funded (Micron)

Application Deadline Rolling

Posted Date July 2025

Country United States

Researcher Profile Advanced process integration expert in semiconductors

Required Qualification MS or PhD in Engineering, Physics, Chemistry, or related fields

Required Experience Experience in DRAM/NAND/3DIC, hybrid bonding, integration, and yield optimization

Salary Details Competitive with US-based benefits

Micron Technology, a global leader in advanced memory and storage, is hiring a DMTS Process Integration Engineer for its Advanced Packaging Technology Development (APTD) team in Boise, Idaho.

This is a senior role ideal for engineers passionate about nanotechnology, 3DIC integration, hybrid bonding, and yield enhancement in next-gen memory packaging solutions. You’ll help define Micron’s packaging roadmap through hands‑on process development, line monitoring, and statistical analysis — all while driving cross‑functional projects in the semiconductor integration space.

About the Team
Micron’s TD division is where groundbreaking innovation begins. From DRAM to 3D NAND and beyond, the TD team transforms novel ideas into manufacturing‑ready solutions, pushing the limits of memory technology through collaborative R&D.

Key Responsibilities

• Lead process integration efforts in 3DIC, hybrid bonding, FO-WLP, and other packaging innovations
• Develop line monitoring methods, yield improvement plans, and statistical process controls
• Design and analyze experiments (DoEs) using advanced analytics and system tools
• Drive cross‑site project coordination, communication, and technology transfer
• Mentor early‑career engineers, lead KT problem‑solving, and contribute to training sessions
• Define contingency plans, build integration flows, and align direction with global teams
• Present findings across teams and publish ECN and change documentation
• Translate design goals into process innovation across integration domains

Required Qualifications

• MS or PhD in Electrical, Mechanical, Materials, Computer Engineering, Physics, or Chemistry
• Strong background in Advanced Packaging, DRAM, NAND, 3DIC, hybrid bonding, or FO‑WLP
• Proficiency in data analysis, JMP/system tools, and process diagnostics
• Leadership and communication skills across cross‑functional R&D and manufacturing teams
• Adaptability in dynamic, high‑tech environments

Micron offers a collaborative, innovation‑first culture with robust benefits including healthcare plans, paid time off, global learning opportunities, and long‑term career development.

By joining this team, you’ll help bridge the gap between front‑end process development and advanced packaging integration — fueling memory performance and efficiency for AI, 5G, and edge computing systems.

🚨 Disclaimer:
Micron does not charge candidates any fees. AI‑assisted resumes are welcome but must reflect accurate experience. Misrepresentation may lead to disqualification. All applications are subject to Micron’s equal opportunity and labor compliance policies.

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