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Cadence Design Systems seeks a Director of System Engineering & Integration to lead end-to-end system integration across silicon, hardware, firmware, network and software for complex emulator platforms. You will own integration strategy, bring-up, and verification while aligning global cross-functional teams.
The role requires deep expertise in system engineering, large computing rack architectures, and leadership of distributed engineering groups.
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
The Director of System Engineering & Integration leads the definition, architecture, and execution of end-to-end system integration across silicon, hardware, firmware, network and software for complex emulator platforms. This role owns the integration strategy, system bring-up, and verification required to deliver production-ready systems, while driving alignment across globally distributed, cross-functional teams.
Build and lead global engineering teams responsible for system integration and validation. Drive execution excellence, organizational scaling, and talent development. Foster strong collaboration across hardware, firmware, software, ASIC, and operations teams.
Define the system integration architecture and technical strategy across ASIC, hardware, firmware, FPGA, and system software. Establish design-for-integration principles, interface contracts, and integration readiness criteria. Guide cross-functional technical decisions across interconnects, embedded systems, and system infrastructure.
Own end-to-end integration and bring-up of multi-subsystem platforms. Define and drive system-level validation and verification strategies, including performance and stress testing. Lead resolution of complex cross-layer issues across hardware and software.
Establish scalable validation infrastructure, automation frameworks, and test environments. Drive standardization and reuse of system-level test methodologies.
Own system readiness from bring-up to production release, ensuring performance and reliability targets. Partner with engineering and product leadership to ensure predictable delivery.
Education: BS degree in Electrical Engineering, Computer Engineering, or related fieldwith a minimum of 12 years of experience OR MS with a minimum of 10 years of experience OR PhD with a minimum of 8 years of experience Masters / advanced degree in related field preferred.
Drives successful integration and delivery of complex emulator systems, ensuring seamless interaction across hardware, firmware, network, and software while shaping system engineering practices at scale.
The annual salary range for California is $178,500 to $331,500. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location.
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Cadence plays a critical role in creating the technologies that modern life depends on. We are a global electronic design automation company, providing software, hardware, and intellectual property to design advanced semiconductor chips that enable our customers create revolutionary products and experiences. Thanks to the outstanding caliber of the Cadence team and the empowering culture that we have cultivated for over 25 years, Cadence continues to be recognized by Fortune Magazine as one of the 100 Best Companies to Work For.
Our shared passion for solving the world’s toughest technical challenges, our dedication to pushing the limits of the industry, and our drive to do meaningful work differentiates the people of Cadence.
Cadence is proud to be an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, sex, age, national origin, religion, sexual orientation, gender identity, status as a veteran, basis of disability, or any other protected class.