Director, FPGA & eSoftware for Ultra-Low Latency Trading

JPMorgan Chase & Co.; Jersey City (NJ); On-site; USD 230,000 - 350,000; Full time

Job summary

JPMorgan Chase & Co. in Jersey City seeks a Director of eSoftware Engineering to drive technical direction and deliver ultra-low latency market infrastructure for equities electronic trading.

You will lead FPGA-based pipelines, network subsystems, and AI-assisted verification workflows across hardware and software teams. You will own the verification strategy, coordinate with internal compute and networking groups, and partner with outside vendors to ensure production readiness and high

Qualifications

• Formal training or certification on software engineering concepts and 10+ years applied experience.
• 5+ years of experience leading technologists to manage, anticipate and solve complex technical items within your domain and across the organization.

Responsibilities

• Architect, implement, and optimize ultra-low latency FPGA-based pipelines for market data ingest, processing, and distribution as well as trading workflows, with a focus on determinism, measurement discipline, and production readiness.
• Design and deliver high-performance network subsystems on FPGA, including deep TCP/IP expertise and complementary protocol support (UDP, IP, multicast, ARP), time synchronization (PTP), and loss/latency instrumentation suitable for production operations.
• Engineer and integrate Layer 1 switching and ultra-low latency signal distribution capabilities, including deterministic path design and the physical and topology constraints typical of low-latency market access environments.
• Partner with network engineering teams and external vendors to design, validate, and operate low-latency connectivity solutions, including microwave / wireless links, with clear operational runbooks and measurable service-level objectives.
• Own verification strategy and execution, building robust testbenches in Python/Cocotb to achieve high functional coverage, strong regression quality, and fast debug cycles.
• Drive timing closure and performance predictability, including floorplanning, static timing analysis, CDC/RDC correctness, power optimization, and post-route validation under realistic traffic and corner conditions.
• Serve as technical lead for a team hardware and software engineers across the program lifecycle, taking large programs from requirements through production rollout while coordinating with internal compute and networking service organizations and managing outside vendors.
• Lead the team's adoption and scaling of AI-assisted and spec-driven workflows for FPGA development and verification, including executable specifications, spec-to-implementation traceability, AI-assisted RTL generation and refactoring, automated code review, testbench and stimulus generation, bug triage, and performance tuning, with appropriate controls for correctness, IP protection, confidentiality, and auditability.

Skills

Ultra-low latency pipelines

Python/Cocotb

SystemVerilog/UVM

TCP/IP networking

AI-assisted FPGA development

Team leadership

Education

10+ years software engineering experience

5+ years leadership experience

Tools

FPGA toolchains

PCIe / DMA / AXI

Network test equipment

Job description

JPMorgan Chase & Co. in Jersey City seeks a Director of eSoftware Engineering to drive technical direction and deliver ultra-low latency market infrastructure for equities electronic trading.

You will lead FPGA-based pipelines, network subsystems, and AI-assisted verification workflows across hardware and software teams. You will own the verification strategy, coordinate with internal compute and networking groups, and partner with outside vendors to ensure production readiness and high