Digital Designer

Acceler8 Talent; Berkeley, Northern (CA, KY); On-site; USD 225,000 - 275,000; Full time

Job summary

Acceler8 Talent partners with an early-stage semiconductor startup in Berkeley, developing a novel AI computing platform by integrating photonics and silicon. This onsite role offers significant ownership of RTL and digital IC work within a small, highly technical team.

You will design RTL, drive digital implementation from RTL through synthesis and timing, assist silicon bring-up, and collaborate across architecture, photonics, packaging and physical design teams; join a team where breakthrough

Qualifications

• Experience designing production RTL for ASIC or SoC designs.
• Hands-on experience with synthesis, timing analysis, and digital implementation.
• Experience taking digital designs through tape-out and silicon bring-up.
• Strong understanding of the end-to-end digital IC design flow.
• Builder's mindset with the ability to own problems across multiple disciplines.

Responsibilities

• Design RTL for next-generation AI hardware.
• Own digital implementation from RTL through synthesis, timing, and place & route.
• Bring silicon up in the lab and debug real hardware.
• Work closely with architecture, photonics, packaging, and physical design teams.
• Help scale the company's digital IC capability as it grows.

Skills

RTL Design

ASIC Design

Verilog / SystemVerilog

Digital IC Design

Synthesis

STA

Place & Route

Silicon Bring-up

Gate-Level Simulation

Advanced Process Nodes

Job description

Senior Digital IC Engineer

Berkeley, CA (Onsite)

Up to 250k base + founding equity.

I'm working with an early-stage semiconductor startup building a fundamentally new computing architecture for AI.

Rather than scaling traditional electronic compute, they're combining photonics and silicon to rethink how AI workloads are processed - unlocking significantly higher performance and energy efficiency for next-generation AI infrastructure.

The team is small, exceptionally technical, and already has working silicon including a 256x256 tapeout. This is a chance to join at the point where breakthrough research becomes real products.

You'll work on

• Designing RTL for next-generation AI hardware
• Owning digital implementation from RTL through synthesis, timing, and physical implementation
• Bringing silicon up in the lab and debugging real hardware
• Working closely with architecture, photonics, packaging, and physical design teams
• Helping build the company's digital IC capability as it scales.

We're looking for engineers who have

• Experience designing production RTL for ASIC or SoC designs
• Hands-on experience with synthesis, timing analysis, and digital implementation
• Experience taking digital designs through tape-out and silicon bring-up
• Strong understanding of the end-to-end digital IC design flow
• A builder's mindset with the ability to own problems across multiple disciplines

Particularly relevant experience includes

• RTL Design
• ASIC Design
• Verilog / SystemVerilog
• Digital IC Design
• Synthesis
• Static Timing Analysis (STA)
• Place & Route
• Silicon Bring-up
• Gate-Level Simulation
• Advanced Process Nodes

If you're looking for a role where you'll own meaningful parts of the chip, work alongside an elite engineering team, and help build a completely new AI computing platform, I'd love to chat.