Digital Design Intern: DSP & Verilog for Mixed-Signal ICs

Cirrus Logic, Inc.

Austin (TX)

Hybrid

USD 27,552 - 48,216

Full time

14 days+
Application generator

An application made for this job — a tailored resume and cover letter that speak straight to the posting.

Get past ATS filters

Job summary

A leading technology company is seeking Digital Design Interns to contribute to the development of mixed‑signal integrated circuits. Candidates should be pursuing an MS or PhD in Electrical Engineering and possess strong skills in Digital Signal Processing and Verilog. This internship offers a collaborative environment with hands-on experiences and a flexible in-office work schedule. The internship will span 12-16 weeks during the Fall 2026 semester, requiring interns to be in the office up to 5 days a week based on team needs.

Qualifications

  • Currently pursuing a MS or PhD in Electrical Engineering or a related field.
  • Strong understanding of Digital Signal Processing (DSP) concepts.
  • Proficiency in Verilog and Synopsys‑based design flows.

Responsibilities

  • Design and implement RTL modules using Verilog for DSP and data conversion ICs.
  • Perform logic simulation, functional verification, and synthesis in a mixed‑signal environment.
  • Collaborate with the design team on integration and system‑level verification.

Skills

Digital Signal Processing (DSP) concepts
Verilog proficiency
MATLAB for algorithm development
Familiarity with PWM techniques
Understanding of transistor-level simulators

Education

MS or PhD in Electrical Engineering or related field

Tools

Synopsys-based design flows

Job description

A leading technology company is seeking Digital Design Interns to contribute to the development of mixed‑signal integrated circuits. Candidates should be pursuing an MS or PhD in Electrical Engineering and possess strong skills in Digital Signal Processing and Verilog. This internship offers a collaborative environment with hands-on experiences and a flexible in-office work schedule. The internship will span 12-16 weeks during the Fall 2026 semester, requiring interns to be in the office up to 5 days a week based on team needs.
Get your free, confidential resume review.
or drag and drop your file here.
Similar jobs

Similar jobs worth comparing

Analog Design Intern - Mixed-Signal ICs (Fall 2026)
Analog Design Intern - Mixed-Signal ICs (Fall 2026)

Cirrus Logic, Inc. • Austin (TX)

On-site
Design Verification Intern – Mixed-Signal (Fall 2026)
Design Verification Intern – Mixed-Signal (Fall 2026)

Cirrus Logic, Inc. • Austin (TX)

Hybrid
Paid Summer Internship - Digital Design Engineer Intern
Paid Summer Internship - Digital Design Engineer Intern

Credo • San Jose (CA)

On-site
USD 100,000 - 125,000
Fall 2026 Co-Op - Digital Design Engineer
Fall 2026 Co-Op - Digital Design Engineer

Cirrus Logic, Inc. • Austin (TX)

Hybrid
USD 27,552 - 48,216
Mixed-Signal Verification Intern
Mixed-Signal Verification Intern

Cirrus Logic, Inc. • Chandler (AZ)

Hybrid
Analog/Mixed-Signal Design Intern: Build High‑Perf Circuits
Analog/Mixed-Signal Design Intern: Build High‑Perf Circuits

Omni Design Technologies, Inc. • Milpitas (CA)

On-site
USD 100,000 - 125,000
Analog/Mixed-Signal IC Design Intern — High-Impact Circuits
Analog/Mixed-Signal IC Design Intern — High-Impact Circuits

Omni Design Technologies, Inc. • Austin (CO)

On-site
USD 100,000 - 125,000
Senior Digital IC Design Engineer Verilog & DSP
Senior Digital IC Design Engineer Verilog & DSP

Cirrus Logic • Chandler (AZ)

On-site
USD 90,000 - 130,000
SoC Digital Design Engineer (RTL & DSP)
SoC Digital Design Engineer (RTL & DSP)

Cirrus Logic • Chandler (AZ)

On-site
USD 85,000 - 115,000
Digital Design Intern: FPGA, Verilog & Lab Debug
Digital Design Intern: FPGA, Verilog & Lab Debug

Murata Electronics • San Diego (CA)

On-site
USD 44,000 - 80,000