Digital Design Intern: FPGA, Verilog & Lab Debug

Murata Electronics; San Diego (CA); On-site; USD 44,000 - 80,000; Full time

Job summary

pSemi Corporation, a Murata company located in San Diego, invites students for an Intern, Digital Design - Fall 2026. The role focuses on design verification/validation for Analog Mixed-Signal and Digital products, developing and validating circuit IP blocks for product development.

The internship involves creating self-checking test benches, FPGA system development using RTL, and lab debugging of FPGA prototypes with analyzers and scopes. Strong Python and CMOS knowledge are beneficial.

Qualifications

• Ability to develop RTL and run Verilog simulations.
• Familiarity with FPGA development tools and lab debug of FPGA design projects.
• Familiarity with sequential and combinational logic, FSMs and data path components.
• Familiarity with timing, metastability, setup/hold constraints.
• Familiarity with memory components, storage elements.
• Familiarity with software techniques, particularly Python.
• Familiarity with digital logic design and synthesis.
• Understanding of CMOS silicon circuits.
• Familiarity with operating lab equipment including DIO, SMUs, and oscilloscopes.

Responsibilities

• Develop and simulate self-checking, functional design verification, and validation test benches.
• Development of FPGA systems using logic design and RTL coding.
• Lab Debug of FPGA prototypes using logic analyzers, oscilloscopes and signal generators.
• Modify C code controlling automated test equipment.

Skills

RTL design

Verilog

FPGA tools

Sequential logic

Finite state machines

Data path components

Timing constraints

Memory concepts

Python

Digital logic design

CMOS basics

Lab equipment

Education

Electrical Engineering or Computer Engineering degree

Tools

Cadence CAD tools

Simvision/Xcelium

Genus

Innovus

DIO/SMUs/Oscilloscopes

Job description

pSemi Corporation, a Murata company located in San Diego, invites students for an Intern, Digital Design - Fall 2026. The role focuses on design verification/validation for Analog Mixed-Signal and Digital products, developing and validating circuit IP blocks for product development.

The internship involves creating self-checking test benches, FPGA system development using RTL, and lab debugging of FPGA prototypes with analyzers and scopes. Strong Python and CMOS knowledge are beneficial.