Digital ASIC Design Lead — RTL, Signoff & Tapeout

Ralliant; Louisville (CO); On-site; USD 149,000 - 277,000; Full time

Job summary

Tektronix in Louisville, CO (or Beaverton, OR) seeks an ASIC Design Manager to lead digital ASIC design, verification, and physical implementation across the full flow from architecture to tapeout. You will mentor engineers, set technical direction, and ensure timing, power, and manufacturability targets are met.

This hands-on leadership role requires strong ASIC development experience, cross‑functional collaboration, and a track record of delivering silicon milestones on schedule, working with

Qualifications

• Bachelor’s degree in Electrical/Computer Engineering or related field.
• Significant ASIC development experience including digital design and physical implementation.
• Experience leading multidisciplinary engineering teams and projects.

Responsibilities

• Lead digital ASIC design, verification, and physical implementation teams.
• Own end-to-end ASIC development flow from arch to tapeout.
• Coordinate with IP, foundries, and packaging partners to meet schedules.

Skills

Digital ASIC design

Leadership / mentoring

RTL design with SystemVerilog/Verilog

Synthesis & STA

Floorplanning / physical design

Education

Bachelor’s degree in Electrical/Computer Engineering or related field

Master’s or PhD preferred

Tools

Cadence/Synopsys/Siemens EDA tools

UVM verification

DFT/packaging interfaces

Job description

Tektronix in Louisville, CO (or Beaverton, OR) seeks an ASIC Design Manager to lead digital ASIC design, verification, and physical implementation across the full flow from architecture to tapeout. You will mentor engineers, set technical direction, and ensure timing, power, and manufacturability targets are met.

This hands-on leadership role requires strong ASIC development experience, cross‑functional collaboration, and a track record of delivering silicon milestones on schedule, working with