DFT Design Engineer: RTL & Test Innovation

Intel Corporation; Austin (TX); On-site; USD 142,000 - 200,000; Full time

Benefits offered by this job

Stock bonuses

Health benefits

Vacation

Job summary

Intel Corporation in Austin, TX is seeking a DFT Design Engineer to shape silicon solutions with a focus on DFT integration in SoCs and IPs. You will work across architecture, design, verification, and manufacturing to enhance test coverage and optimize power, performance, and area.

The role requires hands-on RTL development, ATPG/scan expertise, and strong collaboration with cross-functional teams to deliver high-quality DFT blocks for production.

Qualifications

• Bachelor's degree in Electrical or Computer Engineering is required.
• 5+ years in DFT, SoC design, or related semiconductor design areas.
• Hands-on experience with ATPG, scan insertion, and MBIST/repair.
• RTL design experience using Verilog, VHDL, or SystemVerilog.

Responsibilities

• Develop logic design and RTL coding to support DFT features like SCAN, MBIST, and BSCAN.
• Provide timing closure support and test content generation for manufacturing.
• Collaborate to define architecture and microarchitecture for blocks/SoCs under DFT.
• Optimize designs for power, performance, area, timing, and test coverage.
• Write, integrate, and verify RTL and structural code for DFT functionality.
• Lead verification efforts to achieve architecture/microarchitecture specs.
• Support IP/SoC integration ensuring high-quality DFT blocks.
• Develop HVM content for rapid bring-up on ATE.
• Collaborate with post-silicon and manufacturing teams to verify features on silicon.

Skills

RTL design

ATPG/scan

Verilog/SystemVerilog

Timing/closure

Education

Bachelor's degree in Electrical/Computer Engineering

Tools

Tessent Shell

SSN methodology

MBIST

Verilog HDL tooling

Job description

Intel Corporation in Austin, TX is seeking a DFT Design Engineer to shape silicon solutions with a focus on DFT integration in SoCs and IPs. You will work across architecture, design, verification, and manufacturing to enhance test coverage and optimize power, performance, and area.

The role requires hands-on RTL development, ATPG/scan expertise, and strong collaboration with cross-functional teams to deliver high-quality DFT blocks for production.