Design Verification Technical Architect

Quest Global

Santa Clara (CA)

On-site

USD 150,000 - 190,000

Full time

14 days+

Get more replies from employers

Send a job-specific resume in minutes.

Benefits offered by this job

Health insurance
Paid time off
Retirement plan

Job summary

Quest Global is seeking an experienced verification engineer to lead a team dedicated to building state-of-the-art verification environments for various chip technologies, including automotive and AI. This position involves extensive hands-on work with high-speed protocols and interaction with cross-functional teams.

The ideal candidate has over 10 years of DV experience, knowledge of SV-UVM, and expertise in verification environment setup. Comprehensive benefits package offered, including health insurance and retirement plan.

Qualifications

  • 10+ years of DV experience.
  • Hands-on knowledge of SV-UVM.
  • Experience leading a team.
  • Expertise in Python scripting.
  • Experience with high-speed protocols.

Responsibilities

  • Build verification environments for various chip types.
  • Lead the verification team to ensure project completion.
  • Responsible for DV deliverables and metrics.
  • Work with cross-functional teams to resolve issues.

Skills

SV-UVM
Verilog
Python
High-speed protocols
Communication skills

Job description

What You Will Do
  • Build State‑of‑Art Verification environment for IP, SS, SOC ranging from automotive to AI chips
  • Lead verification team and execution of different projects to completion
  • Hands‑on work in building verification environment involving processors, high speed peripherals (PCIe, UCIe, DDR)
  • Work with cross‑functional (PD, DFT, Design, Emulation) team to resolve issues
  • Responsible for DV deliverables and DV closure meeting required metrics such as code coverage, functional coverage
What You Will Bring
  • 10+ YOE DV experience
  • Good hands‑on knowledge of SV‑UVM
  • Experience leading a team
  • Experience building environment, verification plan, test plan
  • Experience building reusable verification environment for SS, SOC
  • Experience integrating third‑party VIP
  • Python scripting expertise
  • Use of source control such as git or equivalent
  • Hands‑on experience with at least one high‑speed protocol (UCIe/PCIe5+/LPDDR5+/Ethernet200G+)
  • GLS experience
  • Arm Core/C‑Base experience
  • Emulation experience and more
  • Multiple high‑speed protocol experience
Pay Range

$150K to $190K

Benefits

Compensation decisions are based on experience, skills, education, and other job‑related factors. We offer a comprehensive benefits package, including health insurance, paid time off, and retirement plan.

Required Work Experience
  • Verilog
  • SV‑UVM
  • Python
  • Arm‑Core/RISC‑V
  • C
  • High‑speed protocols such as UCIe/PCIe5+/LPDDR5+/Ethernet200G+
  • AMBA protocol
  • Verification environment setup experience at SS/SOC level
  • Planning and execution of entire project
  • Integrating and using third‑party VIP
  • Excellent communication skill and work in global environment
Get your free, confidential resume review.
or drag and drop your file here.
Similar jobs

Similar jobs worth comparing

Design Verification Engineers
Design Verification Engineers

Tachyum • Las Vegas (NV)

On-site
USD 100,000 - 140,000
Competitive salary
Benefits package
Professional development
+3
Design Verification Engineer
Design Verification Engineer

7Rays Semiconductors • San Jose (CA)

On-site
USD 120,000 - 150,000
Verification Engineering Lead/Manager
Verification Engineering Lead/Manager

Omnidesigntech • Milpitas (CA)

On-site
USD 140,000 - 210,000
Design Verification Engineer, Principal
Design Verification Engineer, Principal

PATTERNS LLC • Santa Clara (CA)

On-site
USD 140,000 - 190,000
Bonus
Comprehensive benefits
Design Verification Engineer
Design Verification Engineer

Infobahn Softworld Inc • Longmont (CO)

On-site
Design Verification Architect
Design Verification Architect

TylSemi • San Jose (CA)

On-site
USD 150,000 - 180,000
Verification Engineering Lead/Manager
Verification Engineering Lead/Manager

Omni Design Technologies, Inc. • Milpitas (CA)

On-site
USD 130,000 - 160,000
Design Verification Engineer
Design Verification Engineer

Eximietas Design LLC • San Jose (CA)

On-site
USD 140,000 - 210,000
Hardware Verification Engineer
Hardware Verification Engineer

Baya Systems • Austin (TX)

On-site
USD 100,000 - 150,000
Design Verification Engineer
Design Verification Engineer

Intelliswift - An LTTS Company • Austin (TX)

On-site
USD 120,000 - 150,000