Design Verification Engineering Intern - Bachelors

118-WW TMG MFG OPS; Dallas (TX); On-site; USD 34,000 - 55,000; Full time

Job summary

Texas Instruments in Dallas is seeking a Design Verification intern to contribute to pre-silicon verification efforts. You will work with design and system teams to develop verification plans and create test benches, tests and simulations for DUT behavior.

You'll run coverage regressions for SystemVerilog models and collaborate with teams to track status, communicate issues, and improve DV tools and flows. The position does not sponsor visas.

Qualifications

• Pursuing a Bachelor's degree in Electrical Engineering, Computer Engineering or Electrical & Computer Engineering.
• Cumulative GPA 3.0/4.0 or higher.
• Strong verbal and written communication, and collaboration skills.

Responsibilities

• Develop detailed verification plans with design and system teams.
• Develop test benches, tests and simulations for DUT behavior.
• Run coverage regressions to meet SystemVerilog coverage goals.
• Track verification status, issues and concerns.
• Work with regression tools and develop scripts to submit cases.
• Verify chip-level timing between analog and digital circuits.
• Contribute to DV strategy, tools, methods and flows.

Skills

Verbal communication

Written communication

Team collaboration

Problem-solving

Education

Bachelor's degree in Electrical Engineering, Computer Engineering or Electrical & Computer Engineering

Tools

Regression tools

Scripting

RTL/Gates+SDF

Job description

We can't predict what the future holds, but we know Texas Instruments will have a part in shaping it.

As a Design Verification intern in this group, you will be responsible for:

• Developing detailed verification plans while working closely with the design and system team to ensure pre- silicon verification success
• Developing test benches, tests and simulations to DUT behavior
• Running coverage regressions to meet the defined coverage goals for SystemVerilog functional coverage models of mixed-signal circuits for voltages and currents, real numbers, integers, and traditional digital functional coverage.
• Tracking and communicating verification status, issues, and concerns
• Work with regression tools and develop scripts to submit cases for regression analysis
• Utilize RTL and Gates+SDF, including verifying chip-level timing between analog and digital circuits.
• Constrained-random stimulus and auto-checking verification environments, especially constrained-random analog stimulus.
• Contribute to continuous improvements for quality and efficiency on DV strategy, tools, methods and flows

Put your talent to work with us as a Design Engineer Intern – change the world, love your job!

Texas Instruments will not sponsor job applicants for visas or work authorization for this position.

Minimum requirements:

• Currently pursuing a Bachelors degree in Electrical Engineering, Computer Engineering or Electrical & Computer Engineering
• Cumulative 3.0/4.0 GPA or higher

Preferred qualifications:

• Ability to establish strong relationships with key stakeholders critical to success, both internally and externally
• Strong verbal and written communication skills
• Ability to quickly ramp on new systems and processes
• Demonstrated strong interpersonal, analytical and problem-solving skills
• Ability to work in teams and collaborate effectively with people in different functions
• Ability to take the initiative and drive for results
• Strong time management skills that enable on-time project delivery