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Design Verification Engineer, Senior Staff

Marvell Semiconductor, Inc.

Santa Clara (CA)

On-site

USD 124,000 - 187,000

Full time

8 days ago

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Job summary

A leading semiconductor company seeks an experienced verification engineer to develop and maintain verification environments for complex SoCs. This role involves collaboration with design teams, hands-on development using SystemVerilog, Verilog, and C++, and addressing critical design issues. The ideal candidate will possess strong problem-solving skills and thrive in a fast-paced environment while taking part in groundbreaking technologies.

Benefits

Flexible time off
401k plan
Year-end shutdown
Paid volunteer time
Health and wellness programs

Qualifications

  • 5+ years of professional experience required.
  • Strong understanding of digital design principles.
  • Hands-on experience with functional verification techniques.

Responsibilities

  • Develop architecture for functional verification environment.
  • Write verification test plans and optimize the testing environment.
  • Collaborate with RTL engineers and own simulation debugging.

Skills

Problem-Solving
Debugging
Collaboration

Education

Bachelor's degree in Computer Science or Electrical Engineering
Master’s or PhD in related fields

Tools

C++
SystemVerilog
Verilog

Job description

About Marvell

Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities.

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.

Your Team, Your Impact

Marvell switching solutions have been driving change in networks by delivering a stream of technical innovations through a broad portfolio of segment-focused Ethernet switch product families. Our technology powers the next generation of borderless and secure networks, addressing the surge of the data economy. Marvell Prestera and Teralynx switches provide the bandwidth scale for various applications with advanced packet processing and analytics to meet demanding needs.

What You Can Expect

  • Develop the architecture for a functional verification environment, including reference models, bus-functional monitors, and drivers.
  • Collaborate with architects/RTL engineers to bring-up new architecture/micro-architecture in the verification environment.
  • Develop testbench components in SystemVerilog, UVM, C, and C++, and write tests in SystemVerilog, UVM, C, C++, Python to verify ASIC and SoC design blocks.
  • Debug test failures and root cause issues within the test environment and design.
  • Write verification test plans using random techniques and coverage analysis, working with designers to ensure completeness.
  • Develop tests and optimize the environment to meet coverage goals.
  • Own and debug simulation failures to identify root causes.
  • Architect, develop, and maintain tools to streamline the design of multicore SoCs.
  • Analyze and achieve code and functional coverage closure.

What We're Looking For

  • Bachelor's degree in Computer Science, Electrical Engineering, or related fields, with 5+ years of professional experience. Master’s or PhD with 3+ years of experience is also acceptable.
  • Experience with functional verification techniques.
  • Strong understanding of digital design principles and methodologies.
  • Hands-on experience with Verilog, SystemVerilog, and C++.
  • Understanding of Ethernet networking.
  • Excellent problem-solving and debugging skills.
  • Effective communication and collaboration skills.
  • Ability to work in a fast-paced, dynamic environment.

Expected Base Pay Range (USD)

124,420 - 186,400 per annum. The starting pay will be determined based on skills, experience, qualifications, location, and market conditions.

Additional Compensation and Benefits

We offer a total compensation package including base salary, bonus, and equity. Benefits include health and financial wellbeing programs, flexible time off, 401k, year-end shutdown, floating holidays, and paid volunteer time. For questions about benefits, ask your recruiter during the interview.

All qualified applicants will receive consideration regardless of race, color, religion, sex, national origin, sexual orientation, gender identity, disability, or veteran status.

Applicants requiring accommodations should contact Marvell HR at TAOps@marvell.com.

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