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Design Verification Engineer

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United States

Remote

USD 100,000 - 125,000

Full time

30+ days ago

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Job summary

An exciting opportunity for a Design Verification Engineer to work 100% remotely across the USA. This role requires a strong background in System Verilog and a hands-on approach to test development and debugging. You will be responsible for verifying complex SOC designs, utilizing your expertise in ARM architecture and EDA tools. The ideal candidate will possess excellent problem-solving skills and a methodical approach to debugging. Join a dynamic team and contribute to innovative projects in a long-term position that offers flexibility and the chance to make a significant impact in the field of design verification.

Qualifications

  • Expertise in System Verilog and UVM, with strong debugging skills.
  • Experience with ARM processor-based SOCs and EDA tools.

Responsibilities

  • Conduct verification using System Verilog and C for SOCs.
  • Debug issues and perform dynamic CDC verification.

Skills

System Verilog
UVM
Debugging
Problem-solving
Dynamic CDC verification
Clock sweep tests
Complex reset architectures

Tools

Jasper Gold

Job description

Role: Design Verification Engineer 100% Remote - Any location in USA

Duration: Long term

  1. General verification expertise:
    System Verilog
    UVM working experience (In the current scenario not much on UVM, but heavily on C)
    Understanding of ARM processor based SOCs, AXI / AHB
    Working knowledge of Processor based C tests for SOC verification (test coding, compilation, loading in TB, failure debug)
    Strong hands-on work experience of test development, simulation along with usage of popular EDA tools
  2. Good debug skills:
    Check that engineer has done reasonable amount of debug in past projects
    Has logical and methodical approach to debug issues/failures
    Has used standard tools for debugging, as applicable
    Coresight knowledge/debug is an added advantage. We have many tests for connectivity using Jasper Gold; need quick debug effort and it is good to have that skill set.
  3. Good problem-solving skills:
    Assess by giving some sample problems to solve online during the interview
  4. Specific experience with the following is a big advantage:
    1. Dynamic CDC verification
    2. Clock sweep tests, dynamic frequency scaling
    3. Verification of complex reset architectures
    4. Debugging of above issues in GLS environment
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