Design Verification Architect – AI Compute IP

Amadeus Search; San Francisco (CA); Hybrid; USD 120,000 - 160,000; Full time

Benefits offered by this job

Competitive compensation

Equity participation

High autonomy and ownership

Job summary

A fast-growing AI startup is seeking a Design Verification Engineer to lead verification efforts for internal IP blocks. You'll collaborate with design teams, develop verification strategies, and ensure high-quality integration into larger systems. Candidates should have 5+ years in design verification, proficiency in SystemVerilog, and excellent debugging skills. This role offers competitive compensation and the chance to work in a pioneering environment focused on AI workloads.

Qualifications

• 5+ years of design verification experience in a hardware environment.
• Deep understanding of digital logic and microarchitecture.
• Experience with functional coverage and regression automation.

Responsibilities

• Lead verification efforts on internal IP blocks.
• Define verification strategies and develop testbenches.
• Collaborate with design engineers to ensure IP quality.

Skills

Design verification experience

Proficiency in SystemVerilog

Excellent debugging skills

Collaboration and communication skills

Education

Bachelor’s or Master’s in Electrical Engineering/Computer Engineering

Tools

Simulation tools

Job description

A fast-growing AI startup is seeking a Design Verification Engineer to lead verification efforts for internal IP blocks. You'll collaborate with design teams, develop verification strategies, and ensure high-quality integration into larger systems. Candidates should have 5+ years in design verification, proficiency in SystemVerilog, and excellent debugging skills. This role offers competitive compensation and the chance to work in a pioneering environment focused on AI workloads.