AI Hardware Design Verification Engineer

OpenAI; Los Angeles (CA); On-site; USD 120,000 - 160,000; Full time

Benefits offered by this job

Equal opportunity employer

Reasonable accommodations for disabilities

Job summary

A leading AI research organization in Los Angeles is seeking a Design Verification Engineer to verify cutting-edge ML accelerators. You will be responsible for ensuring functional correctness in complex hardware systems, ranging from individual IP blocks to full SoC functionality. The ideal candidate has a BS/MS in EE/CE/CS, 3+ years of verification experience, and is proficient in SystemVerilog and UVM. This role offers an opportunity to contribute to advanced AI hardware development in a collaborative environment.

Qualifications

• 3+ years of experience in hardware verification.
• Proven success verifying complex IP or SoC designs.
• Experience in fast-paced, cross-disciplinary teams.

Responsibilities

• Own the verification of custom IP blocks or SoC functionality.
• Develop constrained-random and system-level testbenches.
• Drive bug triage and work with design teams on resolution.

Skills

SystemVerilog

UVM

Debug tools

Computer architecture

Performance modeling

Education

BS/MS in EE/CE/CS or equivalent

Tools

VCS

Questa

Verdi

Job description

A leading AI research organization in Los Angeles is seeking a Design Verification Engineer to verify cutting-edge ML accelerators. You will be responsible for ensuring functional correctness in complex hardware systems, ranging from individual IP blocks to full SoC functionality. The ideal candidate has a BS/MS in EE/CE/CS, 3+ years of verification experience, and is proficient in SystemVerilog and UVM. This role offers an opportunity to contribute to advanced AI hardware development in a collaborative environment.