Silicon Prototype Engineer

Apple, Inc.; Cupertino (CA); Sur place; USD 187 000 - 225 000; Plein temps

Avantages offerts par ce poste

Employee stock programs

Discretionary RSU awards

Medical and dental coverage

Retirement benefits

Tuition reimbursement

Relocation

Résumé du poste

APPLE INC in Cupertino, California is seeking a hardware emulation engineer to design and emulate SoC models. You will write Verilog RTL, C/C++ DPI transactors, SV assertions, and develop new flows for emulation model builds.

You will collaborate with CAD, design verification, Silicon validation, DFT and SW teams to optimize performance and resource usage. 40 hours/week with a base pay range that reflects experience and location.

Qualifications

• Master’s degree or foreign equivalent in Computer Engineering, Computer and Information Technology, or a related field.
• Experience in RTL design and debugging.
• Knowledge of Computer Architecture including pipelines and memory subsystems.
• Experience using Verilog, SystemVerilog, and VHDL.
• Developing transactors using C/C++, and System-Verilog DPI.
• Scripting with Python, Perl, TCL, Makefile.
• Experience with emulation technology.
• Using waveform tools Verdi and Indago.
• Working with synthesized Verilog netlists and test flows including scan/memory dump.

Responsabilités

• Build and set up emulation models for SoC designs at full-chip and block level.
• Write and modify Verilog RTL, C/C++ DPI transactors, SV assertions and coverage.
• Develop and test enhancements and performance optimizations through interactions with EDA vendors.
• Collaborate with CAD, design verification, Silicon validation, DFT and SW teams to understand requirements.
• Debug and root-cause bugs using bus/signal monitors, waveform, logs.

Connaissances

Verilog/SystemVerilog

C/C++ transactors

Python scripting

Waveform debugging

Digital logic design

Formation

Master’s degree in Computer Engineering or related field

Outils

Verdi

Indago

Description du poste

Cupertino, California, United States Hardware

Imagine what you can do here. Apple is a place where extraordinary people gather to do their lives best work. Together we create products and experiences people once couldn't have imagined, and now, can't imagine living without. It's the diversity of those people and their ideas that inspires the innovation that runs through everything we do.

Description

APPLE INC has the following available in Cupertino, California and various unanticipated locations throughout the USA. Build and set up emulation models for various SoC (System on chip) designs at the full-chip and block level using Verilog RTL. Write and modify Verilog RTL (hardware description language), C/C++DPI transactors, SV Assertions and coverage. Utilize scripting languages including Python, Perl, Makefile to maintain and create new flows for emulation model builds and runtime. Collaborate with the CAD, design verification, Silicon validation, DFT and SW teams to understand the requirements and develop new features/capabilities in emulation. Debug and root-cause bugs using various bus/signal monitors, waveform, logs, and tools including Verdi, lndago. Develop and test new enhancements and performance optimizations through interaction with leading EDA vendors. Work with the CAD, design for Test and infra teams to ensure optimal resource utilization and reservations for the emulator hardware. 40 hours/week. At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $187,069 - $225,300/yr and your base pay will depend on your skills, qualifications, experience, and location.

• Apple employees also have the opportunity to become an Apple shareholder through participation in Apple’s discretionary employee stock programs.
• Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple’s Employee Stock Purchase Plan.
• You’ll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses — including tuition.
• Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation.

Learn more about Apple Benefits: https://www.apple.com/careers/us/benefits.html. Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.

Minimum Qualifications

• Master’s degree or foreign equivalent in Computer Engineering, Computer and Information Technology, or a related field.
• Experience and/or education must include:
• Performing digital logic design and debugging for writing RTL code including implementing and analyzing the written code.
• Computer Architecture including pipeline stages and memory sib-system.
• Utilizing digital design languages including Verilog, System Verilog, and VHDL when bringing up and/or debugging multiple chips
• Developing transactors using C/C++, and System-Verilog DPI.
• Utilizing scripting languages including Python, Perl, TCL, and Makefile
• Working with emulation technology.
• Using waveform debug tools including Verdi and Indago.
• Working with synthesized Verilog netlist, test flows including scan dump and memory dump.

Preferred Qualifications

• N/A

This position is not subject to the application limits.

Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant

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