Design Engineer - STA

Broadcom; Fort Collins (CO); On-site; USD 129,000 - 207,000; Full time

Benefits offered by this job

Medical, dental, vision

401(K) with company match

Employee Stock Purchase Program (ESPP)

Paid holidays and time off

Job summary

Broadcom in Fort Collins, CO is seeking a senior engineer with deep VLSI/ASIC design and timing analysis expertise to tackle complex development and support challenges across global teams.

You will apply static timing analysis tools (PrimeTime, Cadence Tempus), model RC networks, and develop timing constraints while collaborating with engineers across time zones. Strong TCL and scripting skills are required.

Qualifications

• Strong understanding of VLSI and ASIC physical design.
• Experience using a static timing analysis tool such as PrimeTime or Tempus.
• Understanding of RC networks and timing propagation; ability to create timing diagrams.
• Proficiency in Python/Ruby, TCL, BASH.
• Excellent collaboration across geographies and multiple teams.

Responsibilities

• Works on significant development and support issues requiring deep analysis.
• Exercises independent judgment in methods and evaluation criteria.
• Creates formal networks involving coordination among groups and across time zones.
• Organizes and presents data clearly and manages multiple tasks.

Skills

VLSI/ASIC design

Timing analysis

STA concepts

Signal integrity

Communication across geographies

Scripting (TCL)

Education

B.S. in Electrical/Computer Engineering

Tools

Synopsys PrimeTime

Cadence Tempus

SPICE analysis

Job description

Please Note:

1. If you are a first time user, please create your candidatelogin account before you apply for a job. (Click Sign In > Create Account)

2. If you already have a Candidate Account, please Sign-In before you apply.

Job Description:

Job Complexity

Works on significant and unique development and support issues where analysis of situations or data requires an evaluation of intangibles along with an in-depth understanding of the underlying design/constraints and implementation techniques used.Exercises independent judgment in methods, techniques and evaluation criteria for obtaining results.Creates formal networks involving coordination among groups and works well with individuals and teams spread across geographical time-zones.

Technical Skills/ background

Strong understanding of VLSI and ASIC physical design

• Should have basic understanding of PLLs and clock networks
• Should be familiar with design elements like flip flops, latches, memories, and basic CMOS logic gates

Experience using a static timing analysis tool. Preferably Synopsys PrimeTime and/or Cadence Tempus.

• Ability to create and debug timing constraints
• Ability to understand and debug warning and error messages from the timing tool
• Ability to generate and understand timing reports

Understanding of basic STA concepts

• Solid understanding of RC networks and how they affect the timing/propagation of signals
• Understanding of Signal Integrity, Crosstalk Delay, and Glitch/Noise Analysis
• Understanding of setup analysis, hold analysis, and other timing checks
• Ability to understand and create timing diagrams

Preferred understanding of more advanced STA concepts

• POCV/SOCV/LVF modeling of variation
• MIS - multi input switching
• CCS/ECSM/NLDM - liberty timing models
• PBA - path based analysis
• LOCV/SOCV - location aware timing derates

Experience on timing SOIC/ 3DIC designs a plus

Experience using SPICE analysis

Coding experience

• TCL is required.Experience with at least one or two other coding languages is preferred

Communication and organizational skills

• Must have the ability to work and clearly communicate with multiple engineers and teams across geographies
• Must have the ability to work with and organize large amounts of data
• Must be able to organize and present data in a clear manner
• Must be able to manage a large variety of tasks
• Strong ability to debug problems and create solutions
• STA requires a person with strong engineering capabilities and good engineering judgement.

Supervision

• Acts independently to determine methods and procedures on new or special assignments.
• May supervise the activities of others.
• Works in close collaboration with supervisor and can effectively context-switch and multi-task based on business need.

Education and Experience required

• BS degree in Electrical Engineering or Computer Engineering and 12+ years related experience; or an MS degree in Electrical Engineering or Computer Engineering and 10+ years related experience.

Programming Languages

• Python/Ruby, TCL, BASH

General

• Professional, open, and highly self-motivated attitude

Compensation and Benefits

The annual base salary range for this position is USD 129,400.00 To USD 207,000.00

As a valued member of our team, you’ll be eligible for a discretionary annual bonus and the opportunity to receive not only a competitive new hire equity grant, but also annual equity awards, connecting your success directly to the company’s growth. All subject to relevant plan documents and award agreements.

Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.

Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.

If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.