Contract Analog Design Engineer: PLLs & FinFET (Onsite)

TekWissen ®; Santa Clara (CA); On-site; USD 60,000 - 86,000; Full time

Job summary

TekWissen Group is seeking an Analog Design Engineer for a 24-month onsite contract in Santa Clara, CA. The role focuses on analog circuit design in FinFET tech, including PLLs, VCOs, charge pumps, and related subblocks. You will work with layout teams and test groups to ensure high-quality silicon.

The ideal candidate has 3-5 years in semiconductors, strong scripting (Python/Perl), and proficiency with Cadence tools and analysis suites. This is a contract position with a competitive pay rate.

Qualifications

• Master's or Bachelor's degree in electrical engineering or equivalent.
• 3-5 years of professional experience in semiconductors preferred.
• Strong problem-solving and communication skills.

Responsibilities

• Design building blocks of a PLL and verify performance, power, reliability, and timing.
• Collaborate with layout and test teams to ensure production-ready silicon and post-silicon characterization plans.

Skills

Analog circuit design

FinFET technology

PLL

VCO

ADE-L/ADE-XL

Cadence

Python

Perl

Education

Master's or Bachelor's in Electrical Engineering

Tools

Spectre

HSPICE

MATLAB

Job description

TekWissen Group is seeking an Analog Design Engineer for a 24-month onsite contract in Santa Clara, CA. The role focuses on analog circuit design in FinFET tech, including PLLs, VCOs, charge pumps, and related subblocks. You will work with layout teams and test groups to ensure high-quality silicon.

The ideal candidate has 3-5 years in semiconductors, strong scripting (Python/Perl), and proficiency with Cadence tools and analysis suites. This is a contract position with a competitive pay rate.