Compiler Engineering Intern: P4/LLVM, ASICs (Mentor-led)

Advanced Micro Devices, Inc.

Santa Clara (CA)

Híbrido

USD 34.000 - 44.000

Jornada completa

Hace 12 días
Generador de candidaturas

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Descripción de la vacante

Advanced Micro Devices, Inc. (AMD) invites you to join its intern/co-op program in the heart of Silicon Valley. You will work with an engineering team on a compiler for the P4 language, targeting AMD ASIC architectures, gaining hands-on experience in a cutting-edge AI ecosystem.

You must be enrolled in a US university at master's level in CS/CE/EE, with strong C++ skills and knowledge of compilers. The role offers mentorship from senior engineers, and is onsite/Hybrid in San Jose or Santa Clara

Formación

  • Enrolled in a US-based university in a Master's program in CS/CE/EE or related field.
  • Strong C++ programming skills with exposure to compilers or language runtimes.
  • Experience with data structures and programming languages.
  • Willingness to collaborate in a distributed team and adapt to a fast-paced environment.

Responsabilidades

  • Collaborate on building a compiler for the P4 language targeting a domain-specific architecture.
  • Contribute to the compiler build and development, leveraging LLVM and P4C.
  • Work with compiler customers and the ASIC team to integrate targets.
  • Receive mentorship from senior engineers to improve skills.

Conocimientos

C++
Compilers
Data structures
Programming languages

Educación

Master's degree in Computer Science/Computer Engineering/Electrical Engineering or related

Herramientas

GitHub
CI/CD

Descripción del empleo

Advanced Micro Devices, Inc. (AMD) invites you to join its intern/co-op program in the heart of Silicon Valley. You will work with an engineering team on a compiler for the P4 language, targeting AMD ASIC architectures, gaining hands-on experience in a cutting-edge AI ecosystem.

You must be enrolled in a US university at master's level in CS/CE/EE, with strong C++ skills and knowledge of compilers. The role offers mentorship from senior engineers, and is onsite/Hybrid in San Jose or Santa Clara

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