Cloud-Scale Physical Design Engineer

Amazon; Cupertino (CA); On-site; USD 157,000 - 213,000; Full time

Benefits offered by this job

Health insurance

401(k) matching

Paid time off

Parental leave

Sign-on payments and RSUs

Job summary

Amazon in Cupertino, CA is seeking a Hardware/Physical Design Engineer for Cloud-Scale ML Acceleration. You will drive physical design flows, RTL2GDS, and collaborate with RTL, Package Design, DFT teams to optimize PPA and cost.

You will lead design optimization, tool evaluation, and dashboard reporting to track QoR and project progress. This role requires strong background in EDA flows, sign-off, and IP integration in data center environments.

Qualifications

• Bachelor's degree in Electrical Engineering or related field.
• Experience with block design using EDA tools including synthesis, floor planning, place & route, timing closure and physical verification.
• Deep understanding of sign-off activities (timing, IR drop, physical verification).

Responsibilities

• Drive block physical implementation through synthesis, floor planning, bus/pin planning, place and route, power/clock distribution, congestion analysis, timing closure, IR drop analysis, physical verification, ECO and sign-off.
• Develop cloud infrastructure to support physical design work.
• Drive improvement in RTL2GDS flows/methodology for PPA and TAT improvement.
• Create Dashboard/central reports for project tracking and visualizing QoR/stats.
• Interface with RTL, Package Design, DFT and other teams to improve methodologies and efficiencies.
• Work with EDA tool vendors to evaluate new tools and improve usability.

Skills

Block Design

EDA tools usage

Synthesis

Floor planning

Timing analysis

Education

Bachelor's degree in Electrical Engineering

Tools

Cadence

Mentor Graphics

Synopsys

Job description

Amazon in Cupertino, CA is seeking a Hardware/Physical Design Engineer for Cloud-Scale ML Acceleration. You will drive physical design flows, RTL2GDS, and collaborate with RTL, Package Design, DFT teams to optimize PPA and cost.

You will lead design optimization, tool evaluation, and dashboard reporting to track QoR and project progress. This role requires strong background in EDA flows, sign-off, and IP integration in data center environments.