Backend Process Integration Engineer – Semiconductors

Intel; Hillsboro (OR); On-site; USD 104,000 - 171,000; Full time

Benefits offered by this job

Competitive pay

Stock bonuses

Health retirement vacation

Job summary

Intel in Hillsboro, Oregon, seeks a PhD-qualified process engineer to join the LTD organization. You will develop and define integrated front-end and back-end process flows for new technology nodes, coordinating across lithography, etch, deposition, diffusion, wet clean, CMP, dielectric and metrology teams to optimize RC performance.

The role demands deep RC/logistics knowledge and hands-on cleanroom experience in BEOL/interconnects, RC/reliability characterization, and data-driven problem

Qualifications

• PhD in electrical engineering, physics, applied physics, materials science, chemical/mechanical engineering, chemistry, optics or related semiconductor field.
• Hands-on cleanroom experience in BEOL integration, interconnect metallization, RC/reliability characterization, and university or industry fab environments.

Responsibilities

• Develop and define integrated front-end and back-end process flows for new technology nodes.
• Coordinate across lithography, etch, deposition, diffusion, wet clean, CMP, dielectric, and metrology teams.
• Optimize RC (resistance-capacitance) performance.
• Establish process windows and integration schemes.
• Analyze yield loss and parametric failures.
• Perform root cause analysis using SPC, DOE, FMEA.
• Drive corrective actions to improve yield and cycle time.
• Implement control plans and process monitoring strategies.
• Use statistical tools such as: Cpk / Ppk, Control charts, Capability analysis
• Ensure margins for electromigration, stress migration, TDDB, time dependent via degradation.

Skills

RC delay

Electromigration

TDDB

Python scripting

Statistical tools

Education

PhD in Semiconductor field

Tools

JMP

Python scripting

SQL

MATLAB

JSL

TCL

Job description

Intel in Hillsboro, Oregon, seeks a PhD-qualified process engineer to join the LTD organization. You will develop and define integrated front-end and back-end process flows for new technology nodes, coordinating across lithography, etch, deposition, diffusion, wet clean, CMP, dielectric and metrology teams to optimize RC performance.

The role demands deep RC/logistics knowledge and hands-on cleanroom experience in BEOL/interconnects, RC/reliability characterization, and data-driven problem