ATE Test Engineer

SheJobs-Diversity Focused Organization; Mountain View (CA); On-site; USD 110,000 - 170,000; Full time

Job summary

SheJobs-Diversity Focused Organization seeks an IP/SoC ATE test engineer to develop and debug test programs for advanced devices in Mountain View, CA. You will perform IP-level characterization, execute HSIO/DDR tests, and translate functional models into production vectors.

Collaboration with design, DV, and product teams is essential. The role focuses on digital test methodologies, staying hands-on with ATE platforms like Advantest 93K and SMT8, and advancing test optimization across AMS

Qualifications

• Bachelor’s or Master’s degree in Electrical/Electronics Engineering.
• Hands-on experience with ATE platforms (Advantest 93K, SMT8).
• Strong background in digital test methodologies.
• Experience with HSIO, DDR, or similar high-speed interfaces.
• Familiarity with vector translation and functional model testing.
• Exposure to IP-level or SoC characterization flows.

Responsibilities

• Develop and debug ATE test programs for IP and SoC devices.
• Perform IP-level characterization and validation.
• Execute functional tests including HSIO, DDR, and vector-based testing.
• Work on SMT8/93K or similar ATE platforms.
• Support translation of functional models into production test vectors.
• Collaborate with design, DV, and product engineering teams.
• Perform debug, failure analysis, and test optimization.
• Contribute to Digital and AMS block testing.

Skills

Digital test methodologies

High-speed interfaces

Vector translation

Education

Electrical/Electronics Engineering degree

Tools

Advantest 93K

SMT8

Job description

Develop and debug ATE test programs for IP and SoC devices.

Perform IP-level characterization and validation.

Execute functional tests including HSIO, DDR, and vector-based testing.

Work on SMT8/93K or similar ATE platforms.

Support translation of functional models into production test vectors.

Collaborate with design, DV, and product engineering teams.

Perform debug, failure analysis, and test optimization.

Contribute to Digital and AMS block testing.

Required Qualifications:

• Hands-on experience with ATE platforms (e.g., Advantest 93K, SMT8).
• Strong background in digital test methodologies.
• Experience with HSIO, DDR, or similar high-speed interfaces.
• Familiarity with vector translation and functional model testing.
• Bachelor’s or Master’s degree in Electrical/Electronics Engineering.

Preferred:

• Experience with mixed-signal (AMS) testing.
• Exposure to IP-level or SoC characterization flows.