Associate Staff CAD Engineer - Physical Verification

Silicon Labs; Austin (TX); On-site; USD 125,000 - 231,000; Full time

Benefits offered by this job

Great medical plans

401k with match

Equity rewards

Life/AD&D coverage

Flexible PTO

Onsite gym

Free downtown parking

Job summary

Silicon Labs in Austin, TX is seeking an Associate Staff CAD Engineer specialized in Physical Verification to lead PV deck development, including DRC, LVS, and dummy fill, and to collaborate with design and layout teams.

You will own PV flows, run impact analyses, review code, and mentor junior engineers while evaluating new tools and AI-assisted methods to improve quality and performance in a fast-paced embedded hardware environment.

Qualifications

• 10+ years of professional experience in electrical engineering with a related degree.

Responsibilities

• Develop PV decks including DRC, LVS and dummy fill.

Skills

DRC rule decks

LVS

dummy fill rules

Calibre SVRF

PERC

Extraction rule decks

Python scripting

Perl scripting

Shell scripting

Automation

Cross-functional collaboration

Education

Bachelor’s/Master’s in Electrical Engineering

Tools

Calibre SVRF

Calibre RVE

Calibre DRV

Virtuoso Layout Editor

Job description

Silicon Labs (NASDAQ: SLAB) is the leading innovator in low-power wireless connectivity, building embedded technology that connects devices and improves lives.

Merging cutting-edge technology into the world’s most highly integrated SoCs, Silicon Labs provides device makers the solutions, support, and ecosystems needed to create advanced edge connectivity applications.

Headquartered in Austin, Texas, Silicon Labs has operations in over 16 countries and is the trusted partner for innovative solutions in the smart home, industrial IoT, and smart cities markets.

Learn more at www.silabs.com.

Associate Staff CAD Engineer - Physical Verification

Austin, TX

Meet the Team

As part of the Central CAD group, the CAD Physical Verification (PV) team develops and supports Physical Verification decks, including DRC, antenna, dummy fill, LVS, and extraction. The team collaborates with internal stakeholders to collect specifications and develop decks such as PERC, float, density, and XOR from scratch. In addition, the team develops and automates flows and methodologies to improve quality, performance, and the user debug experience. The team also collaborates with vendors to debug and resolve tool issues and to evaluate new features and tools.

Responsibilities

• Development of various physical verification rule decks like DRC, LVS and dummy fill
• Conduct and drive impact analysis meetings with stakeholders for deck releases
• Collaborate with CAD, ESD, design, layout and foundry teams to obtain specifications for deck development.
• Support design and layout teams to resolve any PV related issues during design development cycle
• Conduct code reviews and create custom QA testcases to validate the quality of rule decks.
• Develop and maintain PV flows and methodologies to improve quality and performance
• Perform new tool/feature evaluations and benchmarks.
• Work closely with external vendors to report and track bugs in the software

Skills You Will Need

• 10+ years of related professional experience with a bachelor’s or master’s degree in electrical engineering
• Strong expertise in developing and supporting DRC, antenna, density and dummy fill rule decks using Calibre SVRF or similar languages
• Experience coding LVS, extraction and PERC rule decks is a plus
• Proven ability to independently drive new physical verification flows and methodologies from specification through release and adoption
• Demonstrated experience working closely with design and layout engineers to debug and resolve issues during development lifecycle
• Working knowledge of physical verification tools such as Calibre RVE, Calibre DRV, and virtuoso layout editor
• Proficiency in scripting languages including perl, python, and shell to develop custom scripts and automation
• Experience collaborating with cross-functional teams to collect initial specifications, support deck development, and lead deck impact analysis meetings
• Ability to mentor junior engineers and provide technical guidance across PV decks, flows, and methodologies
• Strong attention to detail and the ability to operate effectively in high-stakes environments
• Experience with artificial intelligence (AI) powered tools and technologies used to enhance productivity, analysis, and decision-making

Benefits & Perks

You can look forward to the following benefits:

• Great medical (Choice of PPO or Consumer Driven Health Plan with HSA), dental and vision plans
• Highly competitive salary
• 401k plan with match and Roth plan option
• Equity rewards (RSUs)
• Life/AD&D and disability coverage
• Flexible spending accounts
• Adoption assistance
• Back-Up childcare
• Additional benefit options (Commuter benefits, Legal benefits, Pet insurance)
• Flexible PTO schedule
• 3 paid volunteer days per year
• Charitable contribution match
• Tuition reimbursement
• Free downtown parking
• Onsite gym
• Monthly wellness offerings
• Free snacks
• Monthly company updates with our CEO

The annualized base pay range for this role is expected to be between $124,600 - $231,400 USD. Actual base pay could vary based on factors including but not limited to experience, geographic location where work will be performed and applicant’s skill set. The base pay is just one component of the total compensation package for employees. Other rewards may include an annual cash bonus, equity package and a comprehensive benefits package.

Silicon Labs is an equal opportunity employer and values the diversity of our employees. Employment decisions are made on the basis of qualifications and job‑related criteria without regard to race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status, or any other characteristic protected by applicable law.