ASIC Verification Engineer (UVM & GLS Focus)

Pyramid Consulting, Inc; United States; Remote; USD 83,000 - 96,000; Part time

Job summary

Pyramid Consulting, Inc. has an immediate opening for an ASIC Verification Engineer (UVM & GLS Focus) on a remote US contract role. You will own verification for complex ASIC/SoC blocks, build complete UVM environments, and drive GLS issues and coverage closure.

The position targets 6-10+ years of verified experience and requires strong debugging and waveform analysis skills. You'll collaborate with design, architecture, and customer teams to ensure comprehensive verification coverage.

Qualifications

• 6-10+ years of ASIC/SoC verification experience.
• Proven experience building complete UVM verification environments from scratch.
• Experience with UVM, GLS, functional coverage, and assertions.
• Strong debugging and waveform analysis skills.

Responsibilities

• Own verification of complex ASIC/SoC design blocks from planning through sign-off.
• Develop and maintain UVM-based verification environments from scratch, including testbench infrastructure, agents, drivers, monitors, scoreboards, sequences, and coverage models.
• Drive functional verification using directed and constrained-random methodologies and achieve coverage closure.
• Execute and debug Gate-Level Simulations (GLS), including timing-related failures, SDF-annotated simulations, reset issues, X-propagation, and initialization/debug challenges.
• Perform deep waveform analysis, root-cause debugging, regression triage, and verification sign-off activities.
• Collaborate with design, architecture, and customer teams to ensure comprehensive verification coverage and quality.

Skills

ASIC/SoC verification

UVM

GLS

Functional coverage

Assertions

Debugging

Tools

Synopsys VCS

Cadence Xcelium

Siemens Questa

Job description

Immediate need for a talented ASIC Verification Engineer (UVM & GLS Focus). This is a 06+months contract opportunity with long-term potential and is located in U.S (Remote).

Job ID:26-32052

Pay Range: $60 -$70/hour. Employee benefits include, but are not limited to, health insurance (medical, dental, vision), 401(k) plan, and paid sick leave (depending on work location).

Key Responsibilities:

• Own verification of complex ASIC/SoC design blocks from planning through sign-off.
• Develop and maintain UVM-based verification environments from scratch, including testbench infrastructure, agents, drivers, monitors, scoreboards, sequences, and coverage models.
• Drive functional verification using directed and constrained-random methodologies and achieve coverage closure.
• Execute and debug Gate-Level Simulations (GLS), including timing-related failures, SDF-annotated simulations, reset issues, X-propagation, and initialization/debug challenges.
• Perform deep waveform analysis, root-cause debugging, regression triage, and verification sign-off activities.
• Collaborate with design, architecture, and customer teams to ensure comprehensive verification coverage and quality.

Key Requirements and Technology Experience:

• 6-10+ years of ASIC/SoC Verification experience.
• Proven experience building complete UVM verification environments from scratch.
• UVM
• Gate-Level Simulation (GLS)
• Functional Coverage
• Assertions
• Experience with industry-standard simulators such as Synopsys VCS, Cadence Xcelium, or Siemens Questa.
• Strong debugging skills involving waveform analysis, protocol debugging, and root-cause identification.

Our client is a leading IT Industry, and we are currently interviewing to fill this and other similar contract positions.

Pyramid Consulting, Inc. provides equal employment opportunities to all employees and applicants for employment and prohibits discrimination and harassment of any type without regard to race, color, religion, age, sex, national origin, disability status, genetics, protected veteran status, sexual orientation, gender identity or expression, or any other characteristic protected by federal, state or local laws.