ASIC Verification Engineer

Broadcom; Fort Collins (CO); On-site; USD 110,000 - 176,000; Full time

Benefits offered by this job

Medical, dental and vision plans

401(K) participation including company

Employee Stock Purchase Program (ESPP)

Employee Assistance Program (EAP)

Company paid holidays

Paid sick leave and vacation time

Job summary

Broadcom is seeking an ASIC Verification Engineer to design, implement, and maintain verification infrastructure for diverse ASIC products. You will develop exhaustive verification plans, build reusable testbenches, and scale coverage for first-pass silicon success.

You will drive testbench design using SystemVerilog/UVM, author verification strategies, and manage regression runs. A strong background in SystemVerilog, UVM, and ARM/AMBA knowledge is required.

Qualifications

• Bachelor's degree in Electrical/Computer Engineering or related field with at least 8 years of ASIC verification experience or a Master's with at least 6 years.
• Strong SystemVerilog/Verilog knowledge and experience with SVA and UVM.
• Hands-on testbench development, coverage concepts, and debug experience.

Responsibilities

• Testbench Design & Implementation: Architect, develop, and reuse scalable verification environments using SystemVerilog and UVM, including reference models and scoreboards.
• Verification Strategy & Execution: Create verification plans, run directed and constrained-random tests, and validate ASIC IP blocks.
• Coverage Closure & QA: Track functional and code coverage, write SVA, and debug design bugs.
• Database & Regression Management: Manage design databases, oversee daily/weekly regression runs, triage failures, and monitor performance.

Skills

Testbench design

Verification planning

Regression analysis

Education

Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field

Master's Degree in related field

Tools

SystemVerilog

Verilog

SystemVerilog Assertions (SVA)

UVM

ARM processor architectures

AMBA protocols (AXI/AHB/APB)

DSP algorithms

C/C++

Python

Perl

Tcl

Job description

Job Title: ASIC Verification Engineer

Job Summary

We are seeking a highly skilled ASIC Verification Engineer to design, implement, and maintain advanced verification infrastructure across our diverse portfolio of ASIC products. In this role, you will collaborate with design teams to develop exhaustive verification plans, construct reusable testbenches, and continuously scale verification coverage to ensure first-pass silicon success.

Key Responsibilities

• Testbench Design & Implementation: Architect and develop robust, scalable, and reusable verification environments using SystemVerilog and UVM. Create modular components including reference models, checkers, monitors, scoreboards, and targeted firmware code.
• Verification Strategy & Execution: Author detailed verification plans by analyzing architectural specs. Develop, execute, and debug directed and constrained-random test cases to validate complex ASIC IP blocks.
• Coverage Closure & Quality Assurance: Track, analyze, and maximize functional and code coverage metrics. Write SystemVerilog Assertions (SVA) to implement assertion-based verification and trap corner-case design bugs.
• Database & Regression Management: Establish, maintain, and optimize operation processes for design database management and official database releases. Oversee automated daily/weekly regression runs, triage failures, and manage performance tracking.

Minimum Qualifications

• Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field with a minimum of 8 years of relevant ASIC verification experience.
• OR Master's Degree in a related field with a minimum of 6 years of relevant ASIC verification experience.

Preferred Skillsets & Technical Knowledge

• Languages: Strong proficiency in SystemVerilog, Verilog coding, and SystemVerilog Assertions (SVA).
• Methodologies: Hands-on experience building testbenches from scratch using the Universal Verification Methodology (UVM).
• Flows: Deep understanding of the front-to-back ASIC design and verification lifecycle (pre-silicon simulation, debugging, and coverage closure).
• Architecture & Subsystems: Familiarity with ARM processor architectures and AMBA subsystem protocols (e.g., AXI, AHB, APB).
• Algorithms: Exposure to Digital Signal Processing (DSP) algorithms and translating them into hardware verification reference models.
• Software & Scripting: Strong programming skills in C/C++ and scripting expertise in Python, Perl, or Tcl for environment automation and regression sorting.

Compensation and Benefits

The annual base salary range for this position is USD 109,700.00 To USD 175,500.00

As a valued member of our team, you'll be eligible for a discretionary annual bonus and the opportunity to receive not only a competitive new hire equity grant, but also annual equity awards, connecting your success directly to the company's growth. All subject to relevant plan documents and award agreements.

Broadcom offers a competitive and comprehensive benefits package:

• Medical, dental and vision plans
• 401(K) participation including company matching
• Employee Stock Purchase Program (ESPP)
• Employee Assistance Program (EAP)
• company paid holidays
• paid sick leave and vacation time

The company follows all applicable laws for Paid Family Leave and other leaves of absence.

Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.

If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.