ASIC/RTL Design Engineer

TPI Global Solutions

San Jose (CA)

On-site

USD 180,000 - 260,000

Full time

2 days ago
Be an early applicant
Application generator

An application made for this job — a tailored resume and cover letter that speak straight to the posting.

Get past ATS filters

Job summary

TPI Global Solutions is seeking a Senior/Staff ASIC/RTL Design Engineer in the San Jose area. The role requires 10+ years of hands-on experience across end-to-end SoC design, RTL coding, micro-architecture, and ASIC design flow.

You will lead complex digital designs and work with cross-functional teams including physical design and silicon bring-up. Strong expertise in verification/debug, synthesis, timing closure, and high-speed interfaces (PCIe, DDR4/DDR5, Ethernet, DMA, SATA) is essential.

Qualifications

  • 10+ years of ASIC/RTL/SoC design experience required.
  • Experience with ARM cores and high-speed interfaces (PCIe, DDR4/DDR5, Ethernet, DMA, SATA).
  • Collaborative experience with physical design, software, emulation and silicon bring-up teams.

Responsibilities

  • Lead end-to-end SoC design activities for ASIC/RTL projects.
  • Drive verification/debug, synthesis and timing closure across design teams.
  • Coordinate with physical design, emulation and silicon bring-up groups to ensure design integrity.

Skills

RTL coding
Micro-architecture
ASIC design flow
Verification
Synthesis
Timing closure
ARM cores
PCIe
DDR4/DDR5
Ethernet
DMA
SATA
Physical design
Silicon bring-up
Emulation

Job description

his is a Senior/Staff-level ASIC/RTL Design Engineer role requiring 10+ years of industry experience in end-to-end SoC design. The strongest candidates should have hands-on expertise in RTL coding, micro-architecture, ASIC design flow, verification/debug, synthesis, timing closure, and silicon bring-up, with experience leading complex digital designs.

Core requirements:

  • 10+ years of ASIC/RTL/SoC Design experience.
  • SoC architecture and micro-architecture development.
  • Experience with complete ASIC design flow.
  • Synthesis and timing closure.
  • Experience with ARM cores.
  • Knowledge of high-speed interfaces such as: PCIe, DDR/DDR4/DDR5, Ethernet, DMA, SATA.
  • Experience working with physical design, software, emulation, and silicon bring-up teams.
Get your free, confidential resume review.

or drag and drop your file here.

Similar jobs

Similar jobs worth comparing

Design Engineer - ASIC/RTL
Design Engineer - ASIC/RTL

Infobahn Softworld Inc • San Jose (CA)

On-site
USD 120,000 - 180,000
Senior ASIC/RTL Design Engineer - SoC & Silicon Bring-Up
Senior ASIC/RTL Design Engineer - SoC & Silicon Bring-Up

TPI Global Solutions • San Jose (CA)

On-site
USD 180,000 - 260,000
Principal ASIC/SoC Design Engineer
Principal ASIC/SoC Design Engineer

Chelsea Search Group • Minneapolis (MN)

On-site
USD 170,000 - 210,000
ASIC Chip Lead and Design Engineer
ASIC Chip Lead and Design Engineer

Chelsea Search Group • Minneapolis (MN)

On-site
USD 180,000 - 240,000
Digital Design Engineer - ASIC
Digital Design Engineer - ASIC

Gyga Force • San Jose (CA)

On-site
USD 120,000 - 160,000
Equity
401(k) w/ 3% Match
Comprehensive medical, dental, vision, and life insurance
+3
Staff RTL Engineer
Staff RTL Engineer

Oho Group • San Jose (CA)

On-site
USD 130,000 - 160,000
Principal Digital IC Design Engineer
Principal Digital IC Design Engineer

Chelsea Search Group • Minneapolis (MN)

On-site
USD 140,000 - 210,000
Senior Design Engineer
Senior Design Engineer

MRL Consulting Group | Global Niche Technology Recruitment • Irvine (CA)

On-site
USD 140,000 - 190,000
Senior RTL Design Engineer - SoC/IP Lead
Senior RTL Design Engineer - SoC/IP Lead

Advanced Micro Devices, Inc. • San Jose (CA)

On-site
USD 120,000 - 160,000
Senior ASIC RTL Design Engineer
Senior ASIC RTL Design Engineer

Advanced Micro Devices • San Jose (CA)

On-site
USD 180,000 - 280,000