ASIC Formal Verification Engineer, TPU Compute

Google Inc.; Sunnyvale (CA); On-site; USD 156,000 - 229,000; Full time

Benefits offered by this job

Bonuses

Equity

Comprehensive benefits package

Job summary

A leading tech company in Sunnyvale is seeking an ASIC Formal Verification Engineer to shape the future of AI/ML hardware acceleration. You will drive the development of TPU technology, verifying complex digital designs, especially focusing on TPU architecture integration. An ideal candidate will have a strong background in silicon development, formal verification, and collaboration with architecture and design teams. This position offers a competitive salary range of $156,000-$229,000, plus bonuses and benefits.

Qualifications

• 8 years of experience in silicon development or ASIC/SoC design.
• Experience with formal verification platforms and applications.
• Strong knowledge in silicon-based ICs and chips.

Responsibilities

• Define and drive formal verification sign-off across complex designs.
• Architect and develop reusable formal testbenches and methodology flows.
• Guide logic designers to incorporate formal methods effectively.

Skills

SystemVerilog Assertions (SVA)

Formal verification methods

Collaboration with Architecture and Design teams

Education

Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science or related field

Master's degree or PhD in related fields (preferred)

Tools

Cadence Jasper

Synopsys VC Formal

Siemens Questa Formal

Job description

Mid

Experience driving progress, solving problems, and mentoring more junior team members; deeper expertise and applied knowledge within relevant area.

About the job

In this role, you’ll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You’ll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems.

As an ASIC Formal Verification Engineer, you'll contribute formal verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML- driven systems. You will be part of a team developing ASICs used to accelerate computation in data centers. You will have responsibilities in areas such as project definition, formal verification, and silicon bringup. You will participate in the architecture, documentation, and verification of the next generation of data center accelerators.

The AI and Infrastructure team is redefining what’s possible. We empower Google customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers include Googlers, Google Cloud customers, and billions of Google users worldwide.

We're the driving team behind Google's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more.

The US base salary range for this full-time position is $156,000-$229,000 + bonus + equity + benefits. Our salary ranges are determined by role, level, and location. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific salary range for your preferred location during the hiring process.

Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits. Learn more about benefits at Google.

Responsibilities

• Define and drive the formal verification sign-off approach across complex IP and SoC designs, utilizing advanced formal techniques.
• Architect, develop and deploy reusable formal testbenches, methodology flows, and high-coverage SystemVerilog Assertions (SVA) suites across multiple designs and projects.
• Collaborate with Architecture and Design teams to translate complex system and IP specifications into comprehensive formal verification test plans.
• Maintain and enhance continuous integration, regression flows, and dashboarding to provide formal verification status and sign-off metrics.
• Guide logic designers and verification engineers to effectively incorporate formal methods into their workflows.

Qualifications

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
• 8 years of experience in silicon development or ASIC/SoC design.
• Experience with SystemVerilog Assertions (SVA), and formal verification methods.

Preferred qualifications

• Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
• 10 years of experience with industry standard tools, languages and methodologies relevant to the development of silicon-based ICs and chips.
• Experience with one or more formal verification platforms (e.g., Cadence Jasper, Synopsys VC Formal, or Siemens Questa Formal).
• Experience in formal verification applications such as data-path verification, sequential equivalence checking, and connectivity checking.
• Experience in formally proving correctness of arithmetic units such as floating point adders and multipliers.
• Experience working with schedulers, NOCs and networking topologies, protocols (AXI/AMBA).

EEO

Google is proud to be an equal opportunity and affirmative action employer. We are committed to building a workforce that is representative of the users we serve, creating a culture of belonging, and providing an equal employment opportunity regardless of race, creed, color, religion, gender, sexual orientation, gender identity/expression, national origin, disability, age, genetic information, veteran status, marital status, pregnancy or related condition (including breastfeeding), expecting or parents-to-be, criminal histories consistent with legal requirements, or any other basis protected by law. See also Google's EEO Policy, Know your rights: workplace discrimination is illegal, Belonging at Google, and How we hire.

Google is a global company and, in order to facilitate efficient collaboration and communication globally, English proficiency is a requirement for all roles unless stated otherwise in the job posting.

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