ASIC Design Verification Engineer, Amazon Leo

Anysilicon; San Diego (CA); Hybrid; USD 150,000 - 210,000; Full time

Job summary

Amazon Leo is developing a low Earth orbit satellite network aimed at providing reliable internet connectivity to underserved areas. The role involves working on digital chip SOCs for communication systems, focusing on innovative wireless solutions without legacy constraints.

As an ASIC Design Verification Engineer, you will implement verification environments, author tests in C/C++, run regressions, and collaborate across teams to validate system-level designs using UVM, SystemC, and DPI-C,

Qualifications

• Bachelor's degree in Electrical Engineering or related field.
• 5 years of experience with UVM, C, SystemC, and scripting.
• 5 years of verification experience, preferably in communication systems.

Responsibilities

• Implement a verification environment for testing RTL against reference Matlab/C models.
• Develop detailed test plans, write tests, run regressions, and report progress.
• Write tests in C/C++ for execution on embedded CPUs.
• Develop tests for FPGA and emulation platforms.
• Conduct formal verification of complex blocks to ensure functional correctness.
• Collaborate with design and communication systems teams for system-level verification using UVM, SystemC, and DPI-C.
• Create a highly automated environment for running regressions and maintaining database organization.

Skills

UVM

C

SystemC

scripting

Matlab

verification

DV integration

Education

Bachelor's degree in Electrical Engineering

Master's/PhD preferred

Job description

ASIC Design Verification Engineer, Amazon Leo

Job Description:

Amazon Leo is developing a low Earth orbit satellite network aimed at providing reliable internet connectivity to underserved areas. The role involves working on digital chip SOCs for communication systems, focusing on innovative wireless solutions without legacy constraints.

Responsibilities:

• Implement a verification environment for testing RTL against reference Matlab/C models.
• Develop detailed test plans, write tests, run regressions, and report progress.
• Write tests in C/C++ for execution on embedded CPUs.
• Develop tests for FPGA and emulation platforms.
• Conduct formal verification of complex blocks to ensure functional correctness.
• Collaborate with design and communication systems teams for system-level verification using UVM, System C, and DPI-C.
• Create a highly automated environment for running regressions and maintaining database organization.

Qualifications:

• Bachelor's degree in Electrical Engineering or a related field.
• 5 years of experience with UVM, C, System C, and scripting.
• 5 years of verification experience, preferably in communication systems.

Skills:

• Master's or Ph.D. in Electrical/Communications Engineering (preferred).
• 7 years in digital verification, preferably in communication systems (preferred).
• Familiarity with Matlab and modem design verification (preferred).
• Experience in System C or Matlab model development or DV integration (preferred).
• Knowledge of formal verification techniques (preferred).
• Strong written and verbal communication skills.

Tell us what you're building and we'll recommend qualified vendors for your project.

• ASIC Design Services
• Verification
• Packaging & Wafer
• Semiconductor IP

Find the Right Semiconductor Partner

Tell us what you're building and we'll recommend qualified vendors for your project.

• ASIC Design Services
• Verification
• Packaging & Wafer
• Semiconductor IP

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