ASIC Design Team Lead - Secure Hardware, VHDL/Verilog

Arcfield

Forest Home (NY)

On-site

USD 130,611 - 239,061

Full time

14 days+
Application generator

A complete application in a minute — tailored resume and cover letter, ready to send.

Get past ATS filters

Benefits offered by this job

Health Insurance
Life Insurance
Paid Time Off
Retirement and Savings
Learning and Development opportunities

Job summary

Arcfield is seeking a Design Lead in Forest Home, NY, responsible for designing and developing advanced applications supporting secure processing projects. This role involves leading a team of ASIC design engineers and ensuring the successful implementation of VHDL/Verilog for chip design.

The ideal candidate holds a relevant degree and has substantial experience in VHDL, FPGA targeting, and tools such as Cadence Virtuoso and ModelSim. Compensation ranges from $130,611 to $239,061.

Qualifications

  • 12-15 years of experience for Bachelor's degree holder.
  • 10-13 years of experience for Master's degree holder.
  • 10+ years of experience for Ph.D holder.
  • Must be able to obtain and maintain a Secret clearance.

Responsibilities

  • Design, research, and develop advanced applications for secure processing.
  • Lead a team of ASIC design engineers.
  • Finish developing and debugging VHDL/Verilog for the chip.
  • Perform functionality verification using HDL simulators.
  • Conduct Design for Test (DFT) operations.

Skills

VHDL design targeting Xilinx FPGAs
Cadence Virtuoso
ModelSim/QuestaSim
VHDL and Verilog (or System Verilog) development

Education

Bachelor's degree in Hardware or Electrical Engineering
Master's degree in Hardware or Electrical Engineering
Ph.D in Hardware or Electrical Engineering

Job description

Arcfield is seeking a Design Lead in Forest Home, NY, responsible for designing and developing advanced applications supporting secure processing projects. This role involves leading a team of ASIC design engineers and ensuring the successful implementation of VHDL/Verilog for chip design.

The ideal candidate holds a relevant degree and has substantial experience in VHDL, FPGA targeting, and tools such as Cadence Virtuoso and ModelSim. Compensation ranges from $130,611 to $239,061.

Get your free, confidential resume review.
or drag and drop your file here.
Similar jobs

Similar jobs worth comparing

Secure ASIC Design Lead: VHDL/Verilog, FPGA Prototyping
Secure ASIC Design Lead: VHDL/Verilog, FPGA Prototyping

Arcfield • New York (NY)

Hybrid
USD 130,000 - 240,000
Health Insurance
Paid Time Off
Retirement and Savings
ASIC Design Team Lead
ASIC Design Team Lead

Arcfield • Forest Home (NY)

On-site
USD 130,000 - 240,000
Health Insurance
Life Insurance
Paid Time Off
+2
ASIC Design Team Lead
ASIC Design Team Lead

Arcfield • New York (NY)

Hybrid
USD 130,000 - 240,000
Health Insurance
Paid Time Off
Retirement and Savings
ASIC Design Engineer III
ASIC Design Engineer III

Arcfield • Forest Home (NY)

On-site
USD 82,000 - 199,000
Senior Hardware & ASIC Design Engineer
Senior Hardware & ASIC Design Engineer

Computer Futures • Yorktown Heights (NY)

On-site
USD 100,000 - 130,000
Lead Hardware Engineer – High-Speed Digital & FPGA
Lead Hardware Engineer – High-Speed Digital & FPGA

A2e-Technologies • Los Angeles (CA)

On-site
USD 120,000 - 190,000
Senior FPGA Firmware Engineer - VHDL & Lead Design
Senior FPGA Firmware Engineer - VHDL & Lead Design

Acara Solutions, Inc. • Rancho Santa Margarita (CA)

On-site
USD 94,000 - 106,000
Lead Hardware Engineer - High-Speed FPGA & SI Expert
Lead Hardware Engineer - High-Speed FPGA & SI Expert

A2e Technologies • Irvine (CA)

On-site
USD 140,000 - 190,000
Senior ASIC RTL Design Lead — Remote (US)
Senior ASIC RTL Design Lead — Remote (US)

10xTalents • San Francisco (CA)

On-site
USD 130,000 - 160,000
Senior TS/SCI FPGA/ASIC Hardware Engineer
Senior TS/SCI FPGA/ASIC Hardware Engineer

Acclaim Technical Services, Inc. • Annapolis (MD)

On-site
USD 212,000 - 259,000
Comprehensive benefits package
Career growth opportunities
Flexible work environment