ASIC Design Engineer — Pixel IP

Apple Inc.; Sunnyvale (CA); Hybrid; USD 129,000 - 195,000; Full time

Job summary

Apple Inc. in Sunnyvale, CA is seeking an ASIC Design Engineer to join the Pixel IP front-end team. You will design high-performance, power-efficient pixel processing engines and collaborate across architecture, design and verification to enable rich imaging for Apple devices.

You will write RTL or use high-level synthesis, verify with formal methods, and optimize for timing, area and power. Strong Verilog/SystemVerilog and AMBA knowledge, plus collaboration and communication skills, are

Qualifications

• Bachelor's degree in EE/CE with 10+ years of industry experience.
• Extensive experience with RTL front-end ASIC design using Verilog/SystemVerilog.
• Experience with low-power techniques like clock- and power-gating.
• Collaboration with architecture, design and verification teams.
• Familiarity with AMBA (AXI, AHB, APB) protocols.
• Frontend implementation tasks: synthesis, timing, area/power analysis, linting, CDC/RDC, LEC.
• Scripting languages include Python, Perl, TCL.

Responsibilities

• Design digital hardware by RTL or high-level synthesis with embedded assertions and cover points.
• Write detailed micro-architectural specifications.
• Collaborate with cross-functional teams to maximize performance while minimizing power and area.
• Synthesize your design and optimize for power, timing, and area.
• Work with verification and formal verification teams to debug and verify functionality and performance.
• Manage deliverables to align with project goals and cross-functional engineering efforts.

Skills

SoC Front-end RTL

Verilog

SystemVerilog

Low-power design

Cross-functional teamwork

AMBA protocols

Python scripting

Communication skills

Education

Bachelor's degree in EE/CE

Job description

Do you love creating elegant solutions to highly complex challenges? As part of our Hardware Technologies group, you’ll help design our next-generation, high-performance, power-efficient system-on-chips (SoCs). You will ensure Apple products and services can seamlessly and efficiently handle the tasks that make them beloved by millions! Joining this group means you’ll be responsible for crafting and building the technology that fuels Apple’s devices. Together, we will enable our customers to do all the things they love with their devices!In this highly visible role, you will be at the center of the Pixel IP design effort to capture and display beautiful images and video. You will collaborate with all disciplines, making a critical impact getting functional products to millions of customers quickly.

Description

As an ASIC Design Engineer in the Pixel IP design team, you will work closely with architecture, design, and verification teams to design high performance and low power pixel processing engines. Apply your knowledge of computer architecture and digital design to create digital signal processing pipelines for capturing, improving, compressing, decompressing, and displaying digital still images and video.

In this front-end design role, your tasks will include:

• Design digital hardware by writing high-quality RTL or using a high-level synthesis methodology, with embedded assertions and cover points.
• Writing detailed micro-architectural specifications.
• Collaborating with cross-functional teams to explore solutions that maximize performance while minimizing power and area.
• Synthesizing your design and optimize for power, timing, and area.
• Working closely with design verification and formal verification teams to debug and verify functionality and performance.
• Working independently and manage deliverables to align with the project goals and support cross-functional engineering efforts.

Minimum Qualifications

• Bachelors Degree in EE/CE and 10+ years of relevant industry experience.

Preferred Qualifications

• Extensive experience in SoC front-end ASIC RTL digital logic design using Verilog and System Verilog.
• Practiced in low-power design techniques such as clock- and power-gating.
• Extensive experience working cross-functionally with architecture, design, and verification teams to specify, design, and debug designs.
• Strong collaboration skills with excellent written and verbal communication skills.
• Familiarity with common on-chip bus protocols such as AMBA (AXI, AHB, APB).
• Experience in front-end implementation tasks such as synthesis, timing, area/power analysis, linting, CDC/RDC, and logic equivalence checks.
• Industry exposure to and knowledge of ASIC design methodology including familiarity with relevant scripting languages (Python, Perl, TCL).

At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $129,300 and $194,700, and your base pay will depend on your skills, qualifications, experience, and location.

Apple employees also have the opportunity to become an Apple shareholder through participation in Apple’s discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple’s Employee Stock Purchase Plan.

You’ll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses — including tuition.

Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits

Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.

Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant

At Apple, we believe accessibility is a fundamental human right. You’ll find that idea reflected in everything here — in our culture, our benefits and our digital tools. By welcoming as many perspectives as possible, we help you build a career where you feel like you belong.

Learn about accessibility in Apple’s workplace

Learn about reasonable accommodations for job applicants

Apple accepts applications to this posting on an ongoing basis.