ASIC Design Engineer

Jobot; Atlanta (GA); Hybrid; USD 125,000 - 200,000; Full time

Benefits offered by this job

Competitive salary

Annual performance-based bonus

Stock options

Hybrid work opportunity

Visa sponsorship and/or relocation bonus

Job summary

A leading semiconductor manufacturer is seeking an experienced ASIC designer to define and develop complex systems in Atlanta, GA. The ideal candidate should have a Bachelor’s degree in Electrical Engineering, at least 5 years of ASIC design experience, and proficiency in Verilog and SystemVerilog. This position offers a competitive salary between $125,000 and $200,000, along with a performance-based bonus, stock options, and a hybrid work opportunity.

Qualifications

• Minimum of 5 years of experience in ASIC design and verification.
• Strong understanding of ASIC design flow including RTL design, synthesis, place and route.
• Excellent problem-solving skills and ability to work in a team environment.

Responsibilities

• Define and develop ASICs using advanced hardware description languages.
• Conduct RTL design and synthesis, timing analysis, and full chip integration.
• Work closely with verification engineers for first-pass silicon success.

Skills

Verilog

SystemVerilog

TCL

Python

Linux

Education

Bachelor's degree in Electrical Engineering or related field

Master’s degree (preferred)

Tools

PMIC

Virtuoso

Innovis

SimVision

Synopsys

Job description

Job Details

Leading semiconductor manufacturer with competitive compensation, generous bonus, and stock options. Must be willing to relocate to Atlanta, GA. Salary $125,000‑$200,000 per year with a 10‑15% annual performance‑based bonus, stock options, hybrid work opportunity, and relocation bonus and/or visa sponsorship as needed.

Benefits

• Salary $125,000 to $200,000
• Annual performance‑based bonus (10% to 15%)
• Stock options
• Hybrid work opportunity
• Visa sponsorship and/or relocation bonus as needed

Responsibilities

• Define and develop ASICs using advanced hardware description languages.
• Conduct RTL design and synthesis, timing analysis, and full chip integration.
• Participate in the development of architecture and microarchitecture specifications.
• Utilize your understanding of ASIC design flow to drive physical design and timing closure.
• Conduct feasibility studies and propose design solutions for new features and capabilities.
• Work closely with verification engineers to ensure first‑pass silicon success.
• Collaborate with other team members to resolve design and flow issues related to physical design, identify and help implement potential solutions.
• Drive the development and execution of design and verification methodologies.
• Contribute to the continuous improvement of ASIC design processes and methodologies.
• Provide technical expertise and support to internal and external customers.

Qualifications

• Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field. A Master’s degree is preferred.
• Minimum of 5 years of experience in ASIC design and verification.
• Proficiency in Verilog, SystemVerilog, TCL, Python, and Linux.
• Experience with PMIC, Virtuoso, Innovis, SimVision, and Synopsys.
• Strong understanding of ASIC design flow including RTL design, synthesis, place and route, and timing closure.
• Familiarity with high‑speed and low‑power design techniques.
• Excellent problem‑solving skills and the ability to work in a team environment.
• Strong communication skills, both written and verbal.
• Ability to handle multiple tasks simultaneously and meet deadlines.
• Self‑motivated, with a strong desire to learn and stay updated with the latest in engineering technologies.

Apply

Easy Apply now by clicking the "Easy Apply" button and sending us your resume.

Equal Opportunity Employer

Jobot is an Equal Opportunity Employer. We provide an inclusive work environment that celebrates diversity and all qualified candidates receive consideration for employment without regard to race, color, sex, sexual orientation, gender identity, religion, national origin, age, disability, military status, or genetic information. Jobot also prohibits harassment of applicants or employees based on any of these protected categories. It is Jobot’s policy to comply with all applicable federal, state, and local laws respecting consideration of unemployment status in making hiring decisions.

Background checks may be required with your authorization.