ASIC Architect, Principal (AI Inference)

positron.ai; United States; Remote; USD 180,000 - 240,000; Full time

Benefits offered by this job

Fully paid medical, dental, and vision

Life and disability coverage

Unlimited PTO

13 company holidays

Competitive salary and equity

401(k) matching

Job summary

positron.ai is seeking an AI accelerator architect to shape hardware for large-scale inference. You will lead exploration across ML, software, systems, and chip teams to drive designs from concept to silicon.

You will evaluate model families, compare architectures, and build models estimating latency, throughput, power, and cost, guiding implementation and product direction.

Qualifications

• Broad expertise spanning computer architecture, ML workloads, and silicon implementation.
• Strong mathematical and analytical skills for assessing performance tradeoffs.
• Experience modeling or simulating complex hardware and system architectures.
• Ability to collaborate across software, hardware, and research disciplines.

Responsibilities

• Evaluate transformer, mixture-of-experts, sparse, and long-context models for accelerator needs.
• Compare memory, interconnect, and compute architectures for future designs.
• Build analytic models and simulators to estimate latency, throughput, power, area, and cost.
• Coordinate with compiler, runtime, firmware, systems, ASIC, and ML teams to align hardware plans.
• Translate architectural tradeoffs into actionable recommendations for product direction.

Skills

Computer architecture

Machine learning workloads

Silicon implementation

Performance analysis

Analytical math

Cross-functional collaboration

Job description

Role overview

Shape the architecture of custom accelerators built for large-scale AI inference, balancing model behavior, system performance, and practical silicon constraints. You will lead architectural exploration and performance analysis, working across machine learning, software, systems, and chip implementation teams to guide designs from early concepts toward silicon.

Responsibilities

• Evaluate how transformer, mixture-of-experts, sparse, and long-context models affect accelerator needs, including emerging attention and decoding approaches.
• Compare memory, communication, and interconnect architectures for future accelerator designs.
• Build analytical models and simulation frameworks to estimate latency, throughput, bandwidth use, scaling, power, area, and cost.
• Work with compiler, runtime, firmware, systems, ASIC, and machine-learning teams to align hardware plans with real workloads.
• Translate architectural tradeoffs into recommendations that inform implementation and product direction.

Requirements

• Broad expertise spanning computer architecture, machine learning workloads, and silicon implementation.
• Strong mathematical and analytical skills for assessing performance tradeoffs.
• Experience modeling or simulating complex hardware and system architectures.
• Ability to collaborate across software, hardware, and research disciplines.

Benefits and work setup

Remote-first work with company-provided computer and home-office equipment.

• Benefits include fully paid medical, dental, and vision coverage for employees and dependents, paid life and disability coverage, optional supplemental insurance, unlimited paid time off, 13 company holidays, competitive salary and equity, and a matching 401(k).

Applicants must already be authorized to work in the United States; transfers of eligible H-1B visas may be supported, but new visa sponsorship is unavailable.