AR/VR iOS Developer

Anysilicon; Sunnyvale (CA); Híbrido; USD 180.000 - 280.000; Jornada completa

Descripción de la vacante

Meta in Sunnyvale, CA is seeking a Hybrid ASIC Power Engineer to focus on power analysis and optimizations for AR/VR products. You will analyze RTL and netlist power and help improve efficiency across the design flow.

Ideal candidates have 10+ years in ASIC power, strong scripting skills in Python or Perl, and experience with Synopsys or Cadence tools. This role involves setting up flows, UPF, and clear documentation of findings.

Formación

• 10+ years of experience in ASIC power engineering.
• Experience with power estimation tools and synthesis.
• BS in Electrical Engineering, Computer Science, or equivalent.
• Hands-on scripting and data analysis.

Responsabilidades

• Conduct RTL and netlist level power analysis.
• Post-process and script log files for data analysis.
• Set up, run, debug, and analyze ASIC flows including Synthesis, PD, Power, and Timing.
• Implement RTL and UPF for specific blocks.
• Document and communicate findings clearly.

Conocimientos

ASIC power engineering

Python scripting

Data analysis

Educación

BS in Electrical Engineering, Computer Science, or equivalent

Herramientas

Synopsys DC

Synopsys ICC

Synopsys PrimePower

Cadence Joules

VCS Verdi

SystemVerilog

Descripción del empleo

Meta is seeking a Hybrid ASIC Power Engineer to join our team in Sunnyvale, CA, focusing on power analysis and optimizations for our AR/VR products. The ideal candidate will have extensive experience in ASIC power engineering, particularly in machine learning applications, and will be proficient in Python, Tcl, and SystemVerilog.

Responsibilities:

• Conduct RTL and netlist level power analysis.
• Post-process and script report log files for data analysis and format conversion.
• Set up, run, debug, and analyze ASIC flows including Synthesis, PD, Power, and Timing.
• Implement RTL and UPF for specific blocks.
• Document and communicate findings clearly.

Qualifications:

• 10+ years of experience as an ASIC Power Engineer, CAD Engineer, or Physical Design Engineer.
• Experience with power estimation tools and synthesis, along with some physical design knowledge.
• Understanding of power trade-offs in design and back-end implementation.
• Hands‑on experience in scripting and data analysis.
• BS in Electrical Engineering, Computer Science, or equivalent experience.

Skills:

• Proficiency with Synopsys tools (DC, ICC, PTPX/PrimePower, VCS, Verdi) and/or Cadence (Joules).
• Scripting skills in Python, Perl, or similar for data post-processing.
• Experience in low power design methodologies, including UPF specifications.

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