Analog/Mixed-Signal Design Verification Engineer

Fidelis Companies; Portland (OR); On-site; USD 100,000 - 140,000; Full time

Job summary

A leading semiconductor and electronics manufacturing company is seeking an Analog/Mixed-Signal Design Verification Engineer. This role involves designing verification methodologies for complex systems and requires a master's in Electrical or Computer Engineering with substantial experience in tools such as Cadence AMS Designer. Candidates should possess strong skills in Verilog and Python, along with a solid grasp of analog and digital interfacing.

Qualifications

• 5+ years of experience in mixed-signal design verification.
• Strong understanding of analog concepts and behavioral model refinement.
• Capability to work independently and collaboratively.

Responsibilities

• Design verification methodologies for mixed-signal systems.
• Create automated test environments and perform verification tasks.
• Implement regression automation workflows within the Xcelium environment.

Skills

Verilog-A

Verilog-AMS

SystemVerilog

Python

Perl

TCL

BASH/TCSH

MATLAB

Education

Master’s degree in Electrical or Computer Engineering

Tools

Cadence Virtuoso

Spectre

Verilog-AMS

AMS-Designer

Incisive/Xcelium

Job description

Analog/Mixed-Signal Design Verification Engineer

This role involves designing top-level verification methodologies for mixed-signal systems, including analog/RF and high-speed digital subsystems. Responsibilities include creating automated test environments, performing verification tasks, building utilities for report generation, collaborating with teams to incorporate models, reviewing behavioral models, managing connection modules, developing full-chip tests, and implementing regression automation workflows using Cadence AMS Designer within the Xcelium environment.

Required Qualifications:

• Master’s degree in Electrical or Computer Engineering with 5+ years of experience with tools like Cadence Virtuoso, Spectre, Verilog-AMS, AMS-Designer, or Incisive/Xcelium
• Proficiency in Verilog-A, Verilog-AMS, and SystemVerilog (UVM is a plus)
• Knowledge of scripting languages such as Python, Perl, TCL, or shell scripting (BASH/TCSH)
• Familiarity with MATLAB is advantageous
• Experience building automated, self-checking mixed-signal test environments for regression
• Understanding of the interface between analog and digital domains
• Knowledge of power-aware verification concepts is preferred
• Strong analog concepts understanding and behavioral model refinement skills
• Self-motivated with the ability to work independently and collaboratively

Additional Details:

• Seniority level: Mid-Senior level
• Employment type: Full-time
• Industries: Semiconductor Manufacturing, Computers and Electronics Manufacturing, Computer Hardware Manufacturing