Analog Mixed-Signal Design and Verification Engineer

Anysilicon; Alameda, Northern (CA, KY); Hybrid; USD 180,000 - 240,000; Full time

Job summary

Epia Neuro in California is seeking an Analog Mixed-Signal Design and Verification Engineer to advance neural technology through high-precision analog/mixed-signal circuits. Expect involvement in documentation, spec-driven design, and cross-functional collaboration with layout, digital, and test teams.

The role requires advanced degrees with substantial AMS experience, proficiency in Cadence Virtuoso, and a strong emphasis on reliability, ESD, and device reliability in biomedical applications.

Qualifications

• MS or PhD with 5+ years in AMS IC design/verification.
• Experience with BCD and SOI processes.
• Expertise in Cadence Virtuoso.
• Strong reliability-focused design knowledge.
• Team-oriented and open to feedback.

Responsibilities

• Document all aspects of design.
• Apply spec-driven methodology for scalable, reproducible design.
• Design high-precision, low-noise analog/mixed-signal circuits (bandgap refs, clocks, IO, PLLs, ADCs).
• Model circuits in Verilog-A/AMS, Verilog, SystemVerilog.
• Lead and participate in design reviews.
• Collaborate with layout, digital, and test engineers.

Skills

ASIC design

Biomedical applications

Linux

Scripting

Automation

Version control

ESD design

Reliability

Education

AMS IC design/verification

Tools

Cadence Virtuoso

Job description

Analog Mixed-Signal Design and Verification Engineer

Epia Neuro is a neural technology company focused on developing intent-driven systems to restore function and independence for individuals with neurological conditions. The company integrates implantable neural interfaces, adaptive algorithms, and assistive devices, initially targeting stroke-related motor impairment and expanding to cognitive decline and other neurological disorders, addressing the needs of the aging population.

Responsibilities:

• Document all aspects of design, treating documentation as a first-class citizen.
• Apply spec-driven methodology for scalable, consistent, and reproducible design.
• Design high-precision, low-noise, ultra-low-power analog and mixed-signal circuits, including bandgap references, clocks, IO, PLLs, and ADCs.
• Model circuits in Verilog-A/AMS, Verilog, and/or System Verilog.
• Lead and participate in design reviews.
• Collaborate closely with layout, digital, and test engineers.

Qualifications:

• MS with 8+ years or PhD with 5+ years of experience in AMS IC design/verification with multiple successful tapeouts.
• Experience with BCD and SOI process.
• Expertise in Cadence Virtuoso.
• Strong understanding of ESD, device breakdown, and reliability-first design approach.
• Eagerness to learn, team-oriented, and open to feedback.

Skills:

• Experience in ASIC design for biomedical applications.
• Familiarity with version-control tools (SOS, git, etc.).
• Proficient in a multi-platform compute environment, especially as a strong Linux user.
• Experience in scripting and automation.
• Organized, self-motivated, with the ability to manage multiple projects and priorities; high attention to detail.
• Effective interpersonal and communication skills.