Analog Layout Engineer

Apple; Austin (TX); On-site; USD 90,000 - 150,000; Full time

Job summary

An innovative company is seeking an Analog Layout Engineer to join its dynamic team. In this role, you'll work on cutting-edge systems-on-chip, transforming design ideas into silicon. You'll collaborate closely with circuit designers to create sophisticated analog layouts that meet performance, area, and power requirements. This position offers a fast-paced environment rich with learning opportunities and the chance to contribute to groundbreaking technology. If you're passionate about analog/mixed-signal design and eager to make an impact, this is the perfect opportunity for you.

Qualifications

• 10+ years in analog/mixed-signal layout design of deep submicron CMOS circuits.
• Proficiency in floor-planning and hierarchical layout assembly.
• Excellent communication skills and teamwork ability.

Responsibilities

• Deliver fully-verified analog mixed-signal IP in an SOC flow.
• Develop layouts for mixed-signal and analog circuits in deep sub-micron CMOS.
• Collaborate with circuit design engineers to optimize layout.

Skills

Analog Layout Design

Mixed-Signal Design

CMOS Technology

FinFET Technologies

Communication Skills

Teamwork

Education

Bachelor's Degree in Engineering

Tools

Cadence Virtuoso

SKILL

Perl

TCL

Shell

Python

Cadence Innovus

Job description

Analog Layout Engineer

Location: Austin, Texas, United States

Department: Hardware

Summary

Apple Silicon Engineering Group (SEG) is seeking Analog Layout Engineers to work on the next generation of Apple's systems-on-chip (SOCs). These SOCs, with multi-billion transistors, serve as the core of iPhones and iPads. The focus is on Analog/Mixed-Signal (AMS) circuits, including SerDes for data communication, PLLs for clock generation, and sensors for measuring various physical quantities.

Analog Layout Engineers are crucial in transforming design ideas into silicon, collaborating with circuit designers, and utilizing sophisticated tools and methodologies. The work involves crafting custom analog designs to optimize product performance. This fast-paced environment offers endless learning opportunities and collaboration across multidisciplinary teams.

Responsibilities

• Deliver fully-verified analog mixed-signal IP in an SOC flow.
• Develop sophisticated layouts for mixed-signal and analog circuits in deep sub-micron CMOS technologies.
• Review and analyze floorplans and intricate circuits.
• Run design verification tools on AMS blocks.
• Collaborate with circuit design engineers to plan, schedule, and coordinate layout trade-offs.
• Interpret LVS, DRC, and ERC reports to optimize layout completion.
• Work closely with the circuit design team to exceed specifications.
• Apply CAD tools and mask design knowledge to deliver accurate layouts matching performance, area, and power requirements.

Minimum Qualifications

• B.S. and at least 10 years of relevant industry experience or equivalent.

Preferred Qualifications

• 10+ years in analog/mixed-signal layout design of deep submicron CMOS circuits, with at least 3+ years in FinFET technologies.
• Experience in implementing analog layouts for tight matching, low noise, and low power consumption, including CMOS, BJTs, resistors, capacitors, pad IOs, and ESD.
• Ability to recognize failure-prone structures and work proactively with the circuit team.
• Proficiency in floor-planning and hierarchical layout assembly.
• Understanding of IR drop, RC delay, electro-migration, self-heating, and coupling capacitance.
• Experience with physical verification reports (DRC, ERC, LVS).
• Proficiency in Cadence Virtuoso's advanced features and scripting languages such as SKILL, Perl, TCL, Shell, and Python.
• Excellent communication skills and teamwork ability.
• Additional skills: Cadence Innovus, CAD automation, PCell creation, or familiarity with Machine Learning and AI concepts.

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We do not discriminate or retaliate against applicants discussing their compensation. Apple participates in the E-Verify program where applicable. We are committed to providing reasonable accommodations for applicants with disabilities. Apple is a drug-free workplace and considers qualified applicants with criminal histories in accordance with law. For San Francisco applicants, review the Fair Chance Ordinance. In Massachusetts, lie detector tests are prohibited as a condition of employment.