Analog Design Engineer

Elevate; San Diego (CA); Hybrid; USD 80,000 - 125,000; Full time

Benefits offered by this job

Health insurance

Unlimited PTO

Performance bonuses

Free lunch

Relocation assistance

Retirement plan

Sabbatical

Tuition reimbursement

Volunteer days

Conference attendance

Phone stipend

Employee assistance program

Private equity options

Job summary

Elevate Semiconductor in San Diego, CA is seeking an Analog Design Engineer to join a collaborative team developing leading edge ATE ICs with mixed voltage. You will contribute to high-speed, high-precision circuits and participate in schematic design, layout, and verification.

A Bachelor's degree in Electrical Engineering is required, with 3+ years in analog IC design; a Master’s or PhD is preferred. Strong knowledge of Cadence/Mentor tools and Verilog/C/C++/Python is expected.

Qualifications

• Bachelor's degree in Electrical Engineering required.
• 3+ years of professional experience in analog IC design.
• Experience designing precision analog circuits with participation in at least one successful IC tapeout.
• Strong understanding of analog CMOS circuit design fundamentals.
• Solid understanding of control theory and analog feedback systems.
• Experience designing, analyzing, and optimizing complex feedback loops.
• Experience performing stability analysis and implementing compensation techniques.
• Understanding of the complete IC development lifecycle, including design, verification, characterization, qualification, and manufacturing.
• Experience with LVS, DRC, ERC verification using Cadence/Mentor.
• Programming experience with Verilog/Verilog-A/C/C++/Python.

Responsibilities

• Schematic design and simulation of circuits for high speed and precision Analog ATE circuits.
• Layout, preplacement and post layout simulation of circuits.
• Monte Carlo and corner analysis.
• Mixed signal simulation at chip level.
• Contribute to the development of innovative circuit architectures to optimize power, performance and density.
• Power efficient and high precision design.
• Support IC characterization and test development to qualify for ATE specific parameters and use conditions.

Skills

Analog IC design

Mixed signal design

Control theory

Feedback systems

Verilog / HDL

C / C++ / Python

Schematic design

Education

Bachelor's degree in Electrical Engineering

Master's or PhD in Electrical Engineering or related field

Tools

Cadence

Mentor Graphics

LVS

DRC

ERC

Job description

At Elevate Semiconductor, we empower semiconductor and system test customers by creating world class ICs that tackle the industry’s most complex automated test equipment challenges. Our innovative team designs the lowest power, highest density solutions to reduce cost of test while pushing performance forward.

As an Analog Design Engineer, you will be part of a collaborative team developing leading edge ATE integrated circuits. This role is well suited for an early career engineer who is eager to learn and grow. You will contribute to the design of complex, highly integrated solutions on mixed voltage and mixed gate process technologies, while receiving hands on guidance and mentorship from experienced Senior Engineers.

This is a full-time, onsite position based in San Diego, CA.

Responsibilities

• Schematic design and simulation of circuits for high speed and precision Analog ATE circuits.
• Layout, preplacement and post layout simulation of circuits.
• Monte Carlo and corner analysis.
• Mixed signal simulation at chip level.
• Contribute to the development of innovative circuit architectures to optimize power, performance and density.
• Power efficient and high precision design.
• Support IC characterization and test development to qualify for ATE specific parameters and use conditions.

• Bachelor's degree in Electrical Engineering required. Master's or PhD in Electrical Engineering or a related field preferred.
• 3+ years of professional experience in analog IC design.
• Experience designing precision analog circuits with participation in at least one successful IC tapeout.
• Strong understanding of analog CMOS circuit design fundamentals.
• Solid understanding of control theory and analog feedback systems.
• Experience designing, analyzing, and optimizing complex feedback loops.
• Experience performing stability analysis and implementing compensation techniques.
• Understanding of the complete IC development lifecycle, including design, verification, characterization, qualification, and manufacturing.
• Experience with industry standard analog and mixed signal EDA tools such as Cadence or Mentor Graphics, including LVS, DRC, and ERC verification.
• Experience developing behavioral models for analog circuits to support chip level simulation and validation.
• Programming experience with one or more of the following: Verilog, Verilog A, C, C++, or Python.

Preferred Qualifications

• Experience designing precision analog building blocks such as data converters (ADCs/DACs), amplifiers, voltage references, regulators, or power management circuits.
• Experience designing high voltage (100 V+) and mixed voltage circuits with multiple power domains.
• Familiarity with BiCMOS process technologies.
• Understanding of production test, characterization, and automated test equipment (ATE) environments.
• Experience with signal processing concepts and system level modeling.

Based on the level of experience required for this position and the applicable U.S. prevailing wage requirements, this role is not eligible for employment sponsorship. Candidates must be authorized to work in the United States without current or future sponsorship.

• 100% Employer Paid Health Insurance (Medical, Dental, Vision)
• Unlimited Paid Time Off
• Performance Bonuses
• Daily Free Lunch Catered in by Local Restaurants
• Private Equity Options
• Retirement Plans
• Sabbatical Program
• Tuition Reimbursement
• Volunteer Days
• Relocation Assistance
• Conference Attendance Support
• Biweekly Phone Stipend
• Employee Assistance Program

The salary range for this role is 80000-125000 USD/year. Starting salary will be aligned with your relevant experience and demonstrated capabilities during the interview process. Typically, candidates begin at the initial tier of our compensation range, with placement adjusted for candidates presenting extensive directly applicable experience.