AI-Driven Power Integrity Engineer for Memory Design

Micron Technology, Inc.

San Jose (CA)

On-site

USD 170,000 - 290,000

Full time

14 days+

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Job summary

Micron Technology, Inc. is seeking an engineer to transform memory design workflows by embedding AI and automation into PDN analysis, power integrity validation, and optimization.

You will collaborate with design, CAD, and product teams to reduce manual effort and accelerate tapeout across memory products. The role focuses on building ML and generative AI solutions to automate root-cause analysis, predict IR drop and electromigration risk, and scale AI-enabled workflows across power integrity,

Qualifications

  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science or equivalent practical experience.
  • 5–7 years in power integrity, PDN design, circuit design, physical design, package design, or EDA workflows.
  • Strong coding skills in Python or similar languages.
  • Experience applying data analysis, machine learning, or automation to engineering workflows.
  • Understanding of power delivery networks, IR drop analysis, voltage integrity in semiconductor design.

Responsibilities

  • Embed AI and automation into PDN analysis, power integrity validation, and optimization workflows.
  • Predict IR drop, voltage droop, current density, decoupling effectiveness, and electromigration risk in early design stages.
  • Enable AI-assisted optimization of power grid architectures, bump planning, and package-PDN co-design.

Skills

Python
Data analysis
Machine learning
Automation
Power integrity
PDN design
EDA workflows

Education

Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science
Master's or PhD preferred

Tools

EDA tools

Job description

Micron Technology, Inc. is seeking an engineer to transform memory design workflows by embedding AI and automation into PDN analysis, power integrity validation, and optimization.

You will collaborate with design, CAD, and product teams to reduce manual effort and accelerate tapeout across memory products. The role focuses on building ML and generative AI solutions to automate root-cause analysis, predict IR drop and electromigration risk, and scale AI-enabled workflows across power integrity,

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