AI-Driven PDN & Memory Design Engineer

Micron Technology

San Jose (CA)

On-site

USD 170,000 - 290,000

Full time

14 days+

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Job summary

Micron Technology in San Jose, CA is seeking a skilled AI-enabled engineer to transform memory design workflows by embedding AI into PDN analysis, power integrity validation, and optimization. You will partner with design, layout, CAD, and product teams to reduce manual effort and accelerate tapeout.

The role requires 5–7 years in power integrity, PDN design, and related areas, plus strong Python skills and ML experience.

Qualifications

  • Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, or equivalent practical experience.
  • 5 to 7 years of experience in power integrity, PDN design, circuit design, physical design, package design, or EDA workflows.
  • Strong coding skills with the ability to develop and maintain production-quality software in Python or similar languages.
  • Experience applying data analysis, machine learning, or automation to engineering workflows.
  • Understanding of power delivery networks, IR drop analysis, voltage integrity, or related semiconductor design domains.

Responsibilities

  • Embed AI and automation into PDN analysis, power integrity validation, and optimization workflows
  • Apply data-driven methods to predict IR drop, voltage droop, current density, decoupling effectiveness, and electromigration risk during early design stages
  • Enable AI-assisted optimization of power grid architectures, bump planning, package-PDN co-design, and decap placement
  • Leverage historical design, simulation, and silicon data to drive predictive power integrity insights and design recommendations
  • Develop machine learning and generative AI solutions to automate root-cause analysis and accelerate PDN design-space exploration
  • Collaborate across power integrity, design, CAD, package, and product engineering teams to scale AI-enabled methodologies and workflows

Skills

Python
Data analysis / ML in eng
Power integrity
PDN design
EDA workflows

Education

Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or equivalent

Tools

EDA tools

Job description

Micron Technology in San Jose, CA is seeking a skilled AI-enabled engineer to transform memory design workflows by embedding AI into PDN analysis, power integrity validation, and optimization. You will partner with design, layout, CAD, and product teams to reduce manual effort and accelerate tapeout.

The role requires 5–7 years in power integrity, PDN design, and related areas, plus strong Python skills and ML experience.

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