AI‑Driven FE RTL Infrastructure CAD Engineer

Apple Inc.; Beaverton (OR); On-site; USD 100,000 - 130,000; Full time

Job summary

Apple Inc. is looking for a Front-End (FE) RTL Infrastructure – CAD Engineer in Beaverton, Oregon. This role is crucial for developing and supporting reliable infrastructure that design and verification teams use. The position emphasizes innovation through the incorporation of generative AI solutions.

The ideal candidate will have a Bachelor's degree and proven experience in programming with Python or Perl, along with knowledge in Verilog and SystemVerilog. Join Apple to play a key role in shaping the future of its hardware technology.

Qualifications

• Minimum of a BS degree is required.
• Expertise in programming in Python or Perl is essential.
• Knowledge in Verilog and SystemVerilog is necessary.

Responsibilities

• Develop and support reliable infrastructure for design and verification teams.
• Contribute to Perforce administration and maintain centralized configuration management.
• Drive innovation by integrating AI solutions and improve infrastructure reliability.

Skills

Python programming

Perl programming

Verilog knowledge

SystemVerilog knowledge

Education

Bachelor's degree in a related field

Tools

Front-End EDA tools

Job description

Apple Inc. is looking for a Front-End (FE) RTL Infrastructure – CAD Engineer in Beaverton, Oregon. This role is crucial for developing and supporting reliable infrastructure that design and verification teams use. The position emphasizes innovation through the incorporation of generative AI solutions.

The ideal candidate will have a Bachelor's degree and proven experience in programming with Python or Perl, along with knowledge in Verilog and SystemVerilog. Join Apple to play a key role in shaping the future of its hardware technology.