AI Design Automation Engineer — Build AI-Driven Chip Platforms

AMD

San Jose (CA)

On-site

USD 140,000 - 195,000

Full time

14 hours ago

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Benefits offered by this job

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Job summary

AMD in San Jose, CA seeks an AMD-AECG Design Automation Engineer to build scalable software platforms for AI-powered chip design data. You will craft data pipelines, knowledge graphs, and AI/LLM-driven capabilities to help architects, designers, and verification engineers access engineering knowledge.

The ideal candidate has strong Python, experience with graph databases and LLM-based systems, and familiarity with HDL/RTL semantics.

Qualifications

Strong Python engineering background with rigorous testing in a large codebase.
Experience with graph databases and vector search for retrieval workloads.
Experience with LLM-based/agentic systems: retrieval-augmented generation and agent orchestration.
Familiarity with RTL/HDL/Physical Design semantics and parsing toolchains.
Experience with time-series/relational data stores and cross-backend consistency.
Strong written and verbal communication skills.

Responsibilities

Design, build, and maintain backend data pipelines turning sources into structured representations.
Design and evolve data schemas and queries for new data types at production scale.
Build and extend AI/LLM components for natural language querying of data.
Diagnose and fix reliability and performance issues in distributed batch pipelines.
Design new data pipelines to bring additional data domains onto the platform.
Tune LLM-based components for accuracy, cost, and latency.
Own a TDD-driven development workflow with version control and code reviews.
Collaborate with architecture, verification, and design teams to translate needs.