Advanced CMOS Layout & Mask Designer | PPA Focus

Apple Inc.; Austin, Northern (TX, KY); Hybrid; USD 120,000 - 190,000; Full time

Job summary

Apple Inc. in Austin, TX seeks an experienced layout engineer to design complex digital circuit layouts in deep SubMicron CMOS tech. You will collaborate with layout leads and circuit designers to review floorplans, plan work, and ensure layouts meet specs.

You will run verification tools, interpret CALIBRE reports, and improve power delivery and area efficiency. Responsibilities include planning, scheduling, and negotiating layout tradeoffs, plus using automated P&R tools to speed execution.

Qualifications

• Bachelor's degree or foreign equivalent in Electrical Engineering or related field and 2 years of experience.
• 2 years of experience with each of the listed layout and design verification skills.
• Experience in layout floor-planning, RC delay, electromigration, self-heating, and cross capacitance.
• Proficiency with CADENCE Virtuoso and Calibre tools.

Responsibilities

• Design complex custom layout for digital circuits in deep SubMicron CMOS technologies.
• Review floorplans with Layout lead and circuit designers; plan and schedule work.
• Run layout verification tools and clean megacells to match engineering specifications.
• Interpret LVS, DRC, ERC and DFM reports to finish layouts.
• Achieve best-in-class PPA and robust power delivery; use automated P&R tools.

Skills

Layout floor-planning

Standard cell planning

Hierarchical layout

RC delay analysis

Electromigration

Self-heating effects

DFM yields

LOD effects

IR simulations

PG grid robustness

Calibre DRC/ERC/LVS

Cadence Virtuoso

Cross-functional collaboration

Education

Bachelor's degree in Electrical Engineering or related field

Tools

CALIBRE DRC/ERC/LVS

Cadence Virtuoso

IR simulation tools

Job description

Apple Inc. in Austin, TX seeks an experienced layout engineer to design complex digital circuit layouts in deep SubMicron CMOS tech. You will collaborate with layout leads and circuit designers to review floorplans, plan work, and ensure layouts meet specs.

You will run verification tools, interpret CALIBRE reports, and improve power delivery and area efficiency. Responsibilities include planning, scheduling, and negotiating layout tradeoffs, plus using automated P&R tools to speed execution.