Advanced ASIC / FPGA Verification Engineer

Aleron; Scottsdale (AZ); Hybrid; USD 88,000 - 125,000; Full time

Job summary

Acara Solutions is seeking an experienced Advanced ASIC/FPGA Verification Engineer to drive verification strategy and build robust UVM environments for mission‑critical digital designs in a defense context.

You will collaborate with design, FPGA, ASIC, and systems teams, develop constrained‑random test scenarios, and perform RTL simulations to ensure functional correctness and coverage closures across the lifecycle.

Qualifications

• 5+ years ASIC/FPGA verification or hardware verification with B.E./B.S.
• 5+ years SystemVerilog and UVM experience.
• 3+ years UVM testbenches, BFMs, or scoreboards.
• 3+ years RTL simulation in Linux (Questa/ModelSim).
• 3+ years constrained‑random verification, assertions, coverage.
• 2+ years verification planning and coverage analysis.
• 2+ years scripting (Python/Tcl/Shell).
• Bachelor’s in Electrical/Computer Science or related field.

Responsibilities

• Define and execute ASIC/FPGA verification strategies.
• Develop and maintain UVM environments and testbenches.
• Create test plans, verification methodologies, and documentation.
• Develop constrained‑random scenarios, assertions, scoreboards, coverage.
• Perform RTL simulation and debug failures; validate functionality.
• Support verification traceability and coverage closures.
• Collaborate with design/integration teams on architecture and interfaces.
• Contribute to engineering best practices and process improvements.
• Assist FPGA/ASIC hardware integration and validation.

Skills

SystemVerilog/UVM

RTL verification

Constrained‑random

Python scripting

Debug FPGA/ASIC

Team collaboration

Verilog/VHDL

Education

Bachelor's degree in EE/CE/CS

Master's degree in related field

Tools

Questa

ModelSim

UVM testbenches

QVIP

Job description

Job Title

Advanced ASIC / FPGA Verification Engineer

Location

Scottsdale, AZ or Remote

Employment Type

Contract to Direct

Industry

Defense

Compensation

$77.27/ hour

About the Opportunity

We're seeking an experienced ASIC / FPGA Verification Engineer to support the development of advanced digital systems for mission-critical applications. In this role, you'll drive verification strategy, architect and develop sophisticated UVM test environments, perform functional verification, and collaborate closely with design, FPGA, ASIC, and systems engineering teams throughout the development lifecycle.

This is an excellent opportunity for a verification professional who enjoys solving complex technical challenges and working on cutting‑edge FPGA and ASIC technologies in a highly innovative environment.

Why You'll Love Working Here

• Fully remote flexibility with the option for onsite or hybrid work arrangements
• Opportunity to work on advanced FPGA and ASIC technologies supporting critical national security missions
• Exposure to highly complex digital designs, signal processing applications, and high-speed interfaces
• Collaborative engineering culture focused on innovation, continuous learning, and technical excellence

Why This Opportunity is Exciting

This role offers the opportunity to work on sophisticated FPGA and ASIC programs utilizing industry‑leading verification methodologies and tools. You'll contribute to advanced technologies while helping shape solutions that support highly visible and impactful defense programs.

About Acara Solutions

Acara is a premier recruiting and workforce solutions provider-we help companies compete for talent. With a legacy of experience in various industries worldwide, we partner with clients, listen to their needs, and customize visionary talent solutions that drive desired business outcomes. We leverage decades of experience to deliver contingent staffing, direct placement, executive search, and workforce services worldwide.

What You'll Do

• Define and execute ASIC and FPGA verification strategies throughout the product development lifecycle
• Design, develop, and maintain UVM-based verification environments and testbenches
• Create simulation plans, test plans, verification methodologies, and verification documentation
• Develop constrained‑random test scenarios, assertions, scoreboards, and coverage models
• Perform RTL simulation, debug failures, analyze performance, and validate functionality
• Support requirements‑based verification, coverage closure, and verification traceability
• Collaborate with design engineers on architecture, interfaces, integration, and verification planning
• Participate in process improvement initiatives and contribute to engineering best practices
• Support FPGA and ASIC hardware integration, validation, and troubleshooting activities

What You'll Bring

• 5+ years of ASIC verification, FPGA verification, digital design verification, or hardware verification experience with a Bachelor's degree, OR 3+ years of experience with a Master's degree
• 5+ years of experience using SystemVerilog and Universal Verification Methodology (UVM)
• 3+ years of experience developing UVM testbenches, verification components, agents, scoreboards, or Bus Functional Models (BFMs)
• 3+ years of experience performing RTL simulation using Questa, ModelSim, or similar simulation tools in Linux environments
• 3+ years of experience utilizing constrained‑random verification methodologies, assertions, and functional coverage
• 2+ years of experience supporting verification planning, requirements‑based verification, coverage analysis, or verification closure
• 2+ years of experience using scripting languages such as Python, Tcl, Shell Scripting, or automation tools
• 2+ years of experience debugging FPGA, ASIC, or digital hardware designs
• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, Mathematics, or a related technical field

What Sets You Apart

• Experience with Register Abstraction Layer (RAL) methodologies
• Familiarity with Formal Verification tools and methodologies
• Experience with Questa Verification IP (QVIP)
• Experience developing verification environments for Xilinx FPGA devices, IP cores, or SoC platforms
• Knowledge of AXI, PCIe, Ethernet, SpaceWire, or other high‑speed communication protocols
• Digital Signal Processing (DSP) design and verification experience
• Experience supporting FPGA/ASIC hardware integration and system‑level validation
• GitLab Continuous Integration (CI/CD) experience
• Knowledge of VHDL and FPGA design methodologies
• Experience with high‑speed interface design and complex memory architectures
• Strong problem‑solving, technical leadership, and collaboration skills
• Experience utilizing AI‑assisted tools to improve engineering productivity and automation

Additional Information

• Upon offer of employment, the individual will be subject to a background check and drug test
• Overtime: May be required to support program milestones and project deliverables
• Lifting Requirements: Standard office and engineering environment requirements
• In compliance with federal law, all persons hired will be required to verify identity and eligibility to work in the United States and to complete the required employment eligibility verification form upon hire.

By applying for this job, you agree to receive calls, AI‑generated calls, text messages, or emails from Acara Solutions and its affiliates, and contracted partners. Frequency varies for text messages. Message and data rates may apply. Carriers are not liable for delayed or undelivered messages. You can reply STOP to cancel and HELP for help. You can access our privacy policy at Website Privacy Policy | Acara

Aleron companies (Acara Solutions, Aleron Shared Resources, Broadleaf Results, Lume Strategies, TalentRise, Viaduct) are an Equal Opportunity Employer. Race/Color/Gender/Religion/National Origin/Disability/Veteran.

Applicants for this position must be legally authorized to work in the United States. This position does not meet the employment requirements for individuals with F-1 OPT STEM work authorization status.