ASIC / FPGA Design Engineer (Advanced & Senior Principal Levels)

Aleron; Scottsdale (AZ); On-site; USD 106,000 - 158,000; Full time

Job summary

Aleron is seeking ASIC and FPGA Design Engineers at Advanced and Senior Principal levels in Scottsdale, AZ. The roles focus on architecture, digital design, verification, and lifecycle support of complex FPGA and ASIC solutions used in mission-critical systems.

Roles offer opportunities to lead architecture definitions, drive major programs, and work with advanced tools and teams on defense and space applications. Prior experience with DoD‑related work and security clearances is valued.

Qualifications

• 5+ years in ASIC/FPGA design or 3+ years with master's degree
• Proficiency in VHDL/Verilog/SystemVerilog or RTL
• Experience with FPGA flows: synthesis, timing closure, place-and-route
• Proven hardware design, verification, and validation experience

Responsibilities

• Design, verify, and document ASIC/FPGA solutions across product lifecycle
• Define architecture, micro-architecture, interfaces, and timing strategies
• Perform RTL development, synthesis, place-and-route, timing and power analysis
• Create verification plans and run simulations and functional tests
• Evaluate IP cores, vendors, and development tools
• Support hardware integration, debugging, and system testing
• Collaborate with systems, hardware, software, and program teams
• Participate in design reviews and risk assessments
• Contribute to process improvements and innovation

Skills

ASIC design

FPGA design

digital hardware engineering

RTL development

micro-architectures

scripting (Tcl, Python, Perl)

FPGA verification

debug hardware

team leadership

DoD/clearance awareness

Education

Bachelor's degree in Electrical Engineering or related

Tools

Vivado

ISE

Libero

Synplify/Precision

QuestaSim

Job description

Job Title: ASIC / FPGA Design Engineer (Advanced & Senior Principal Levels)

Location: Scottsdale, AZ

Employment Type: Contract to Direct

Industry: Aerospace/Defense

Compensation: $77.27/hour Advance ASIC FGPA Engineer / $114.62/hour Senior Principal ASIC FPGA Engineer

About the Opportunity

We’re seeking ASIC and FPGA Design Engineers at both the Advanced and Senior Principal levels to support the development of next-generation space and defense technologies. These positions are responsible for architecture development, digital design, verification, simulation, implementation, and lifecycle support of complex FPGA and ASIC solutions used in mission-critical systems.

Whether you’re a hands‑on FPGA designer looking to grow into technical leadership or a seasoned principal engineer ready to define architecture and drive major programs, this opportunity offers the chance to work on cutting‑edge technologies supporting national security and space applications.

Why You’ll Love Working Here

• Work on advanced space, defense, and mission‑critical technologies
• Opportunity to contribute across the full ASIC/FPGA development lifecycle
• Collaborate with highly experienced engineering teams on complex technical challenges
• Exposure to advanced digital design, verification, signal processing, and high‑speed interface technologies

Why This Opportunity is Exciting

This role offers the opportunity to shape sophisticated FPGA and ASIC architectures that support critical missions. You’ll contribute to highly visible programs while working with advanced technologies, modern toolchains, and multidisciplinary engineering teams that are pushing the boundaries of innovation.

What You’ll Do

• Design, develop, verify, and document ASIC and FPGA solutions throughout the product lifecycle
• Define architecture, micro‑architecture, interfaces, simulation strategies, and implementation approaches
• Perform RTL development, synthesis, place‑and‑route, timing analysis, power analysis, and design optimization
• Create and execute verification plans, simulations, and functional testing activities
• Evaluate device technologies, IP cores, vendor capabilities, and development tools
• Support hardware integration, debugging, validation, and system‑level testing
• Participate in engineering change activities, design reviews, and technical risk assessments
• Collaborate with systems, hardware, software, and program teams to achieve project objectives
• Support proposal efforts, technical planning, and project execution activities
• Contribute to process improvements, engineering best practices, and innovation initiatives

Job Requirements

What You’ll Bring

Advanced ASIC / FPGA Engineer

• 5+ years of ASIC design, FPGA design, digital hardware engineering, or related engineering experience with a Bachelor's degree, OR 3+ years of experience with a Master's degree
• 3+ years of experience with VHDL, Verilog, SystemVerilog, or RTL development
• 3+ years of experience with FPGA design flows including synthesis, timing closure, place‑and‑route, and implementation
• 2+ years of experience developing micro‑architectures and detailed hardware designs
• 2+ years of experience using scripting languages such as Tcl, Python, Perl, or related automation tools
• 2+ years of experience supporting FPGA verification, hardware integration, debugging, or validation activities

Senior Principal ASIC / FPGA Engineer

• 10+ years of ASIC design, FPGA design, digital hardware engineering, or related engineering experience with a Bachelor's degree, OR 8+ years of experience with a Master's degree
• 8+ years of experience leading architecture, design, implementation, and verification activities for complex FPGA and ASIC programs
• 5+ years of experience supporting technical leadership, engineering oversight, or large‑scale engineering projects
• 5+ years of experience evaluating technologies, managing technical risks, and defining long‑term technical approaches
• 3+ years of experience supporting subcontractor management, proposal development, supplier technical oversight, or engineering leadership activities

Required for Both Levels

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, Mathematics, or a related technical discipline

What Sets You Apart

• Experience with Xilinx FPGA technologies and tool suites including Vivado and ISE
• Experience with Microchip FPGA devices and Libero
• Experience with Synplify, Precision, or similar synthesis tools
• Experience with QuestaSim, UVM, SystemVerilog Assertions (SVA), and verification methodologies
• Experience with clock‑domain crossing tools such as Questa CDC
• Experience with DSP algorithms and digital signal processing architectures
• Experience with high‑speed interfaces, memory architectures, and embedded processing systems
• Experience with hardware bring‑up and debug using oscilloscopes, logic analyzers, and embedded debug tools
• Active DoD Secret clearance, TS clearance, or TS/SCI clearance
• Experience leading technical teams or mentoring engineers
• Earned Value Management (EVM), Cost Account Management (CAM), or technical project leadership experience
• Knowledge of AI‑assisted engineering, automation, or continuous improvement initiatives

Additional Information

• Workplace options:
  • Onsite
  • Hybrid/Flex
  • Some positions may support remote arrangements based on program requirements
• Upon offer of employment, the individual will be subject to a background check and government security screening
• Overtime: May be required to support program milestones and customer deliverables

Aleron companies (Acara Solutions, Aleron Shared Resources, Broadleaf Results, Lume Strategies, TalentRise, Viaduct) are an Equal Opportunity Employer. Race/Color/Gender/Religion/National Origin/Disability/Veteran.

Applicants for this position must be legally authorized to work in the United States. This position does not meet the employment requirements for individuals with F-1 OPT STEM work authorization status.