Snr Engineer/Engineer, Thin Film PVD Process

Vanguard International Semiconductor Corporation (VIS); Singapore; On-site; SGD 60,000 - 100,000; Full time

Job summary

Vanguard International Semiconductor Corporation (VIS) in Singapore seeks engineers to analyze SPC charts, perform data analyses, and monitor Cp/Cpk indices. You will work on split lots, DOE, and yield data using JMP and Klarity ACE, and create SPC charts and DCOP while modifying SLDB with PROMIS (Si-View).

The role includes ensuring recipe compliance via RMS, following ECN updates, and guiding junior engineers.

Qualifications

• Bachelor-level degree in engineering or science related field required.
• Minimum 2 years wafer fabrication process experience.
• Strong analytical and communication skills.
• Ability to work under pressure and own tasks.

Responsibilities

• Analyze SPC charts using SPACE and monitor Cp/Cpk indices.
• Lead improvement programs and coordinate cross‑department resolution.
• Collaborate with Equipment and Manufacturing teams to drive uptime and OEE.
• Lead small cross-functional teams to resolve yield excursions.
• Set up and troubleshoot recipes across metrology tools.
• Perform self-audits and update specifications to TS16949 standards.

Skills

Analytical thinking

Team player

Communication skills

Documentation/writing

Education

Electrical / Electronics / Microelectronics / Chemical Processing / Chemistry / Physics / Material Sciences / Mechanical

Tools

JMP

Klarity ACE

PROMIS (Si-View)

RMS

MS Office

Job description

• Analyze SPC charts using SPACE; apply PR rules, perform proper annotations for SPC OOC troubleshooting, and monitor Cp/Cpk indices.
• Analyze split lots, DOE, ET, and sort yield data using JMP and Klarity ACE.
• Create SPC charts and DCOP; modify SLDB using PROMIS (Si-View).
• Upload, verify, and ensure recipe compliance using RMS.
• Follow up on SPSR, MRB, 8D, TECN, and spec updates (ECN); provide guidance to junior engineers.
• Set up and troubleshoot recipes/job files across all metrology tools within the module.
• Analyze engineering data to identify chronic process issues and lead improvement programs; establish CAS/procedures and coordinate cross-department resolution.
• Collaborate with Equipment and Manufacturing teams to meet module objectives and drive uptime and OEE targets.
• Lead small cross-functional teams to resolve yield excursions and drive yield improvement.
• Initiate and support CIP programs to optimize process window, yield, cost, and productivity; improve process capability.
• Resolve complex technical and yield-related issues within the module.
• Support cross-fab benchmarking to adopt best practices across fabs.
• Conduct self-audits and update specifications/documentation to meet TS16949 quality standards.

Job Responsibilities

• Analyze SPC charts using SPACE; apply PR rules, perform proper annotations for SPC OOC troubleshooting, and monitor Cp/Cpk indices.
• Analyze split lots, DOE, ET, and sort yield data using JMP and Klarity ACE.
• Create SPC charts and DCOP; modify SLDB using PROMIS (Si-View).
• Upload, verify, and ensure recipe compliance using RMS.
• Follow up on SPSR, MRB, 8D, TECN, and spec updates (ECN); provide guidance to junior engineers.
• Set up and troubleshoot recipes/job files across all metrology tools within the module.
• Analyze engineering data to identify chronic process issues and lead improvement programs; establish CAS/procedures and coordinate cross-department resolution.
• Collaborate with Equipment and Manufacturing teams to meet module objectives and drive uptime and OEE targets.
• Lead small cross-functional teams to resolve yield excursions and drive yield improvement.
• Initiate and support CIP programs to optimize process window, yield, cost, and productivity; improve process capability.
• Resolve complex technical and yield-related issues within the module.
• Support cross-fab benchmarking to adopt best practices across fabs.
• Conduct self-audits and update specifications/documentation to meet TS16949 quality standards.

Requirements

• Degree in Electrical / Electronics / Microelectronics / Chemical Process / Chemistry / Physics / Material Sciences / Mechanical
• Min 2 years of relevant work experience in Wafer Fabrication process and Thin Film PVD Process.
• An excellent team player with good interpersonal, communication and written skills
• Strong logical thinking capability and good analytical skill
• Highly committed with good ownership and accountability
• Able to adapt in a fast-paced environment and work under pressure
• Proficient in MS Office Applications