Senior Engineer/ Engineer ( Thin Film -CMP Process)

Vanguard International Semiconductor Corporation (VIS); Singapore; On-site; SGD 60,000 - 90,000; Full time

Job summary

Vanguard International Semiconductor Corporation (VIS) seeks a capable engineer to analyze SPC charts, DOE data, and yield across thin-film CMP processes. You will use JMP, Klarity ACE, PROMIS, and RMS to ensure recipe compliance and drive uptime and quality improvements.

Collaboration with equipment and manufacturing teams is essential to lead cross-functional tasks and resolve complex process issues. Applicants should hold a degree in Electrical/Electronics or related field, with at least 2

Qualifications

• Analytical thinking and strong problem-solving abilities are required.
• Excellent communication and collaboration with cross-functional teams.
• Ability to work under pressure and adapt to fast-paced environments.

Responsibilities

• Analyze SPC charts and apply SPACE rules; annotate for quality troubleshooting.
• Analyze data (DOE, ET, yield) using JMP, Klarity ACE; improve process yields.
• Create SPC charts and modify SLDB using PROMIS; ensure recipe content compliance with RMS.
• Lead small cross-functional teams to address yield improvements and excursions.
• Drive uptime and OEE improvements in collaboration with Equipment and Manufacturing Engineers.
• Facilitate CIP programs to optimize process window, cost, yield, and productivity.
• Self-audit and update documentation to meet TS16949 quality requirements.

Skills

Analytical skills

Team player

Communication skills

Problem solving

Education

Electrical / Electronics / Microelectronics degree

Tools

JMP

Klarity ACE

PROMIS (Si-View)

RMS

Job description

Job Responsibilities

• Analyze SPC charts using SPACE. Know all the PR rules and their significance. Do proper annotation to maintain quality troubleshooting rate for SPC OOC. Understand Cp and Cpk indices.
• Analyze split lot, DOE data, ET, sort yield using JMP, Klarity ACE.
• Create SPC charts, DCOP and modify SLDB using PROMIS (Si-View).
• Upload recipe, check recipe and ensure recipe content compliance using RMS.
• Follow up on SPSR, MRB, 8D, TECN, or spec update with ECN. Provide guidance to junior Engineers.
• Setup and troubleshoot issues in recipes/ job files in all metrology tools within the Module.
• Analyze data from passed down to identify chronic process issues, establish improvement programs and lead engineers to resolve them. Establish CAS / procedures to be followed and work with other departments for resolution if required.
• Work as a team with both Equipment and Manufacturing Engineers to meet Module objectives. Drive team to meet key indices of Uptime and OEE as per the goals set for these indices.
• Take on leadership roles to drive a small cross functional task team to address yield improvement/ excursion issues.
• Facilitate/ initiate CIP programs to optimize process window, cost, yield, and productivity. Establish plans and strategies to optimize process capability to meet operational requirements.
• Resolve complex technical issues in own Module or yield related issues
• Follow up with cross-fab benchmarking activities to engage the best-in-campus practices across fabs.
• Self audit and update specifications / documentation to meet TS16949 Quality Standard requirements.

Requirements

• Degree in Electrical / Electronics / Microelectronics / Chemical Process / Chemistry / Physics / Material Sciences / Mechanical
• Min 2 years of relevant work experience in Thin Film CMP Process
• An excellent team player with good interpersonal, communication and written skills
• Strong logical thinking capability and good analytical skill
• Highly committed with good ownership and accountability
• Able to adapt in a fast pace environment and work under pressure
• Proficient in MS Office Applications