Server SoC Architect: High-Performance, Low-Power CPUs

BYTEDANCE PTE. LTD.; Singapore; On-site; SGD 180,000 - 260,000; Full time

Job summary

ByteDance's Server Silicon Design and Application Team designs CPUs for data centre servers, delivering high-performance, energy-efficient chips. The role covers architecture design, IP selection, and low-power solutions, collaborating with design and verification teams to optimize performance.

Minimum 5+ years in SoC R&D, strong CPU/system software knowledge, and expertise in PPA analysis and advanced packaging technologies are required. Master's/PhD is preferred for deeper research involvement.

Qualifications

• Bachelor's degree or above in Microelectronics, Integrated Circuits, Electronic Engineering, or a related field; Master's or PhD preferred.
• 5+ years of SoC R&D experience.
• Familiar with CPU architecture, OS, system software, and chip architecture/design.
• Forward-thinking mindset with ability to drive product innovation.
• Capable of independently conducting chip PPA (Power, Performance, Area) analysis.

Responsibilities

• Based on product requirements, participate in SoC system architecture design and build SoC analysis frameworks.
• Design and optimize SoC chip architecture; select IP and design RAS/DFX and low-power solutions.
• Analyze system performance bottlenecks for typical scenarios and benchmarks; propose improvements.
• Collaborate with chip design and verification teams for performance testing and optimization.
• Drive technology breakthroughs; work with upstream/downstream teams on research and feasibility.

Skills

SoC R&D experience

CPU architecture knowledge

OS & system software knowledge

PPA analysis

Server SoC architecture

Education

Bachelor's degree in Microelectronics / IC / Electronic Engineering

Master's or PhD preferred

Tools

Advanced process nodes

Advanced packaging (2.5D/3D/CoWoS/EMIB)

System-level packaging (wafer-scale, SOIC)

Job description

ByteDance's Server Silicon Design and Application Team designs CPUs for data centre servers, delivering high-performance, energy-efficient chips. The role covers architecture design, IP selection, and low-power solutions, collaborating with design and verification teams to optimize performance.

Minimum 5+ years in SoC R&D, strong CPU/system software knowledge, and expertise in PPA analysis and advanced packaging technologies are required. Master's/PhD is preferred for deeper research involvement.