Senior SI/PI Engineer for High-Speed ASICs & Systems

Bitdeer Technologies Group; Singapore; Sur place; SGD 120 000 - 180 000; Plein temps

Avantages offerts par ce poste

Training and mentoring

Open workspaces

Career growth opportunities

Résumé du poste

Bitdeer Technologies Group, headquartered in Singapore, seeks a SI/PI specialist to optimize signal and power integrity across chip, package, and system levels. You will work with chip, package, and board teams to improve floor planning, interconnects, and inter-die performance, and develop robust SI/PI design guidelines.

The role requires hands-on modeling, verification, and sign-off for high-speed interfaces, plus building simulation libraries and workflows.

Qualifications

• Degree in Microelectronics, Telecommunications, Electromagnetics, Microwave Engineering, Physics, or related field.
• Strong theoretical foundation in SI and PI fundamentals.
• Experience with at least one mainstream SI/PI tool.

Responsabilités

• Analyze and optimize Signal Integrity and Power Integrity across chip, package, and system levels.
• Collaborate with chip, package, and board design teams to optimize floor planning and interconnects.
• Conduct modeling, analysis, verification of SI/PI, and sign-off for high-speed interfaces.
• Establish and deliver SI/PI design guidelines and rules.
• Build and maintain simulation libraries, model libraries, simulation environments, SI/PI methodologies, and workflows.
• Correlate SI/PI simulation results with lab measurements and collaborate on cross-functional debugging.

Connaissances

Signal Integrity

Power Integrity

High-speed design

Cross-functional teamwork

Formation

Degree in Microelectronics, Telecommunications, Electromagnetics, Microwave Engineering, Physics, or related field

Outils

ANSYS Electronics Desktop (EDT/HFSS)

HSPICE

Keysight ADS

Cadence Sigrity

Description du poste

Bitdeer Technologies Group, headquartered in Singapore, seeks a SI/PI specialist to optimize signal and power integrity across chip, package, and system levels. You will work with chip, package, and board teams to improve floor planning, interconnects, and inter-die performance, and develop robust SI/PI design guidelines.

The role requires hands-on modeling, verification, and sign-off for high-speed interfaces, plus building simulation libraries and workflows.