Senior Physical Design Engineer - High-Speed PCIe for AI Chips

Bitdeer Group; Singapore; On-site; SGD 80,000 - 120,000; Full time

Benefits offered by this job

Attractive welfare benefits

Training and mentoring opportunities

Job summary

Bitdeer Group in Singapore is seeking a Senior Physical Design Engineer to lead the physical implementation of PCIe IP for AI chips. The successful candidate will manage the full design flow, ensuring high-performance designs across leading-edge processes.

Ideal applicants should have at least 5 years of experience in physical design, strong knowledge of PCIe, and proficiency with industry-standard design tools. The role offers a culture of diversity, personal accountability, and attractive welfare benefits.

Qualifications

• 5+ years of hands‑on physical design experience in advanced TSMC process nodes.
• Strong hands-on experience with CTS for high-speed designs.
• Experience in resolving chip-level DRC / LVS / EMIR issues.

Responsibilities

• Own end-to-end physical design flow for PCIe controller and PHY blocks.
• Perform timing closure for high-speed PCIe Gen interfaces.
• Drive power integrity analysis across the power delivery network.

Skills

PCIe protocol knowledge

Physical design experience

Cadence Innovus

Python

Perl

Education

B.S. / M.S. in Electrical Engineering or related field

Tools

Cadence Innovus

Synopsys Primetime

Calibre

Job description

Bitdeer Group in Singapore is seeking a Senior Physical Design Engineer to lead the physical implementation of PCIe IP for AI chips. The successful candidate will manage the full design flow, ensuring high-performance designs across leading-edge processes.

Ideal applicants should have at least 5 years of experience in physical design, strong knowledge of PCIe, and proficiency with industry-standard design tools. The role offers a culture of diversity, personal accountability, and attractive welfare benefits.