Senior Research Engineer II, Adv Pkg, IME

A*STAR RESEARCH ENTITIES; Singapore; On-site; SGD 110,000 - 190,000; Full time

Job summary

A*STAR RESEARCH ENTITIES is seeking a Reference Flow Development engineer to define, implement, and test end-to-end reference flows for advanced package design. You will develop automated methodologies covering die planning, partitioning, interposer, power/clock routing, and verification across multiple platforms.

The role requires 4+ years in semiconductor design enablement, PDK development, or advanced packaging, with strong scripting skills in Python, SKILL, or Perl.

Qualifications

• 4+ years of experience in semiconductor design enablement, PDK development, physical design, or advanced packaging.
• Experience developing or supporting semiconductor PDKs.
• Strong knowledge of physical verification methodologies including DRC, LVS, ERC, and extraction flows.
• Experience with scripting and automation using Python, SKILL, Perl, or similar languages.

Responsibilities

• Define, implement and test end-to-end reference flows for advanced package design.
• Develop automated methodologies covering die planning and partitioning, interposer/package floorplanning, signal, power, and clock routing, package-aware implementation, physical verification and sign-off, reliability verification, manufacturing signoff.

Job description

Reference Flow Development

• Define, implement and test end-to-end reference flows for advanced package design.
• Develop automated methodologies covering:

• Die planning and partitioningInterposer/package floorplanningSignal, power, and clock routingPackage-aware implementationPhysical verification and signoffReliability verificationManufacturing signoff
• Create workflow automation, scripts, and design utilities to improve design productivity.
• Validate flows across leading EDA platforms including Cadence, Synopsys, Siemens EDA, and Ansys tool

Design Enablement & Validation

• Establish correlation between design simulation and manufacturing process.
• Validate PDKs and flows using internal test vehicles and customer designs.
• Develop extraction methodologies for:

• Interposer parasiticsPackage parasiticsTSV modelingHybrid bond interconnect modelingPower delivery networks

• Support signal integrity (SI), power integrity (PI), thermal, and mechanical analysis flows.
• Develop documentation, application notes, training materials, and design guidelines.

Cross-Functional Collaboration

• Work closely with process integration, device engineering, packaging technology development, and manufacturing teams.
• Collaborate with EDA vendors to enable new advanced packaging features and methodologies.
• Support strategic customers with design onboarding and technical enablement.
• Drive ecosystem development for heterogeneous integration and advanced packaging technologies.

Job Requirements:

• MS or PhD in Electrical Engineering, Computer Engineering, Materials Science, Physics, or related field.
• 4+ years of experience in semiconductor design enablement, PDK development, physical design, or advanced packaging.
• Experience developing or supporting semiconductor PDKs.
• Strong knowledge of physical verification methodologies including DRC, LVS, ERC, and extraction flows.
• Experience with scripting and automation using Python, SKILL, Perl, or similar languages.

Success Metrics

• Delivery of IME qualified advanced packaging PDKs.

• Successful deployment of reference flows with customers and internal STCO teams.
• Improved design productivity and reduced design cycle time.
• High correlation between design signoff and manufacturing results.
• Adoption of advanced packaging technologies across strategic customer programs.

The above eligibility criteria are not exhaustive. A*STAR may include additional selection criteria based on its prevailing recruitment policies. These policies may be amended from time to time without notice. We regret that only shortlisted candidates will be notified.